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Searched refs:ADDRESS_IN_IRAM0_CACHE (Results 1 – 14 of 14) sorted by relevance

/hal_espressif-latest/components/hal/esp32/include/hal/
Dmmu_ll.h108 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || in mmu_ll_check_valid_ext_vaddr_region()
156 } else if (ADDRESS_IN_IRAM0_CACHE(vaddr)) { in mmu_ll_get_entry_id()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dmmu_ll.h101 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dmmu_ll.h101 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dmmu_ll.h100 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/soc/esp32/include/soc/
Dext_mem_defs.h34 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) macro
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dmmu_ll.h106 …return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_D… in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dmmu_ll.h109 …return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_D… in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dext_mem_defs.h32 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dext_mem_defs.h34 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dext_mem_defs.h31 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dext_mem_defs.h34 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dext_mem_defs.h42 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dext_mem_defs.h49 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) macro
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dmmu_ll.h146 } else if (ADDRESS_IN_IRAM0_CACHE(vaddr)) { in mmu_ll_get_entry_id()