Searched refs:ADC_SAR2_DREF_ADDR (Results 1 – 11 of 11) sorted by relevance
| /hal_espressif-latest/zephyr/esp32s2/src/ |
| D | soc_random.c | 44 REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 0x4); in soc_random_enable()
77 REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 0x1); in soc_random_disable()
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| /hal_espressif-latest/components/bootloader_support/src/ |
| D | bootloader_random_esp32s2.c | 49 REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 0x4); in bootloader_random_enable()
82 REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 0x1); in bootloader_random_disable()
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| /hal_espressif-latest/components/soc/esp32h2/include/soc/ |
| D | regi2c_saradc.h | 29 #define ADC_SAR2_DREF_ADDR 0x5 macro
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| /hal_espressif-latest/components/soc/esp32s3/include/soc/ |
| D | regi2c_saradc.h | 49 #define ADC_SAR2_DREF_ADDR 0x5 macro
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| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | regi2c_saradc.h | 49 #define ADC_SAR2_DREF_ADDR 0x5 macro
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| /hal_espressif-latest/components/soc/esp32c6/include/soc/ |
| D | regi2c_saradc.h | 49 #define ADC_SAR2_DREF_ADDR 0x5 macro
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| /hal_espressif-latest/components/soc/esp32c2/include/soc/ |
| D | regi2c_saradc.h | 49 #define ADC_SAR2_DREF_ADDR 0x5 macro
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| /hal_espressif-latest/components/soc/esp32c3/include/soc/ |
| D | regi2c_saradc.h | 49 #define ADC_SAR2_DREF_ADDR 0x5 macro
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| /hal_espressif-latest/components/hal/esp32c3/include/hal/ |
| D | adc_ll.h | 621 REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 1); in adc_ll_calibration_init()
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| /hal_espressif-latest/components/hal/esp32s3/include/hal/ |
| D | adc_ll.h | 737 REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 4); in adc_ll_calibration_init()
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| /hal_espressif-latest/components/hal/esp32s2/include/hal/ |
| D | adc_ll.h | 1054 REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 4); in adc_ll_calibration_init()
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