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Searched refs:intr (Results 1 – 25 of 26) sorted by relevance

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/hal_espressif-3.7.0/components/esp_hw_support/include/hal/
Dinterrupt_controller_hal.h138 FORCE_INLINE_ATTR __attribute__((deprecated)) void interrupt_controller_hal_set_int_type(int intr, … in interrupt_controller_hal_set_int_type() argument
140 esp_cpu_intr_set_type(intr, (esp_cpu_intr_type_t)type); in interrupt_controller_hal_set_int_type()
149 FORCE_INLINE_ATTR __attribute__((deprecated)) void interrupt_controller_hal_set_int_level(int intr,… in interrupt_controller_hal_set_int_level() argument
151 esp_cpu_intr_set_priority(intr, level); in interrupt_controller_hal_set_int_level()
162 FORCE_INLINE_ATTR __attribute__((deprecated)) bool interrupt_controller_hal_has_handler(int intr, i… in interrupt_controller_hal_has_handler() argument
165 return esp_cpu_intr_has_handler(intr); in interrupt_controller_hal_has_handler()
176 void interrupt_controller_hal_set_int_handler(uint8_t intr, interrupt_handler_t handler, void *arg) in interrupt_controller_hal_set_int_handler() argument
178 esp_cpu_intr_set_handler(intr, (esp_cpu_intr_handler_t)handler, arg); in interrupt_controller_hal_set_int_handler()
188 …E_ATTR __attribute__((deprecated)) void *interrupt_controller_hal_get_int_handler_arg(uint8_t intr) in interrupt_controller_hal_get_int_handler_arg() argument
190 return esp_cpu_intr_get_handler_arg(intr); in interrupt_controller_hal_get_int_handler_arg()
[all …]
/hal_espressif-3.7.0/components/hal/
Dspi_slave_hd_hal.c167 spi_ll_intr_t intr = 0; in get_event_intr() local
169 if ((ev & SPI_EV_SEND) && hal->append_mode) intr |= SPI_LL_INTR_OUT_EOF; in get_event_intr()
171 if ((ev & SPI_EV_SEND) && !hal->append_mode) intr |= SPI_LL_INTR_CMD8; in get_event_intr()
172 if (ev & SPI_EV_RECV) intr |= SPI_LL_INTR_CMD7; in get_event_intr()
173 if (ev & SPI_EV_BUF_TX) intr |= SPI_LL_INTR_RDBUF; in get_event_intr()
174 if (ev & SPI_EV_BUF_RX) intr |= SPI_LL_INTR_WRBUF; in get_event_intr()
175 if (ev & SPI_EV_CMD9) intr |= SPI_LL_INTR_CMD9; in get_event_intr()
176 if (ev & SPI_EV_CMDA) intr |= SPI_LL_INTR_CMDA; in get_event_intr()
177 if (ev & SPI_EV_TRANS) intr |= SPI_LL_INTR_TRANS_DONE; in get_event_intr()
178 return intr; in get_event_intr()
[all …]
/hal_espressif-3.7.0/components/soc/esp32/include/soc/
Dgpio_struct.h127 uint32_t intr: 8; /*GPIO32~39 APP CPU interrupt status*/ member
134 … uint32_t intr: 8; /*GPIO32~39 APP CPU non-maskable interrupt status*/ member
141 uint32_t intr: 8; /*GPIO32~39 PRO CPU interrupt status*/ member
148 … uint32_t intr: 8; /*GPIO32~39 PRO CPU non-maskable interrupt status*/ member
155 uint32_t intr: 8; /*SDIO's extent GPIO32~39 interrupt*/ member
/hal_espressif-3.7.0/components/hal/esp32c2/include/hal/
Dgdma_ll.h60 return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK; in gdma_ll_rx_get_interrupt_status()
69 dev->intr[channel].ena.val |= (mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
71 dev->intr[channel].ena.val &= ~(mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
81 dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_clear_interrupt_status()
89 return (volatile void *)(&dev->intr[channel].st); in gdma_ll_rx_get_interrupt_status_reg()
274 return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK; in gdma_ll_tx_get_interrupt_status()
283 dev->intr[channel].ena.val |= (mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
285 dev->intr[channel].ena.val &= ~(mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
295 dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_clear_interrupt_status()
303 return (volatile void *)(&dev->intr[channel].st); in gdma_ll_tx_get_interrupt_status_reg()
/hal_espressif-3.7.0/components/hal/esp32c3/include/hal/
Dgdma_ll.h60 return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK; in gdma_ll_rx_get_interrupt_status()
69 dev->intr[channel].ena.val |= (mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
71 dev->intr[channel].ena.val &= ~(mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_enable_interrupt()
81 dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK); in gdma_ll_rx_clear_interrupt_status()
89 return (volatile void *)(&dev->intr[channel].st); in gdma_ll_rx_get_interrupt_status_reg()
274 return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK; in gdma_ll_tx_get_interrupt_status()
283 dev->intr[channel].ena.val |= (mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
285 dev->intr[channel].ena.val &= ~(mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_enable_interrupt()
295 dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK); in gdma_ll_tx_clear_interrupt_status()
303 return (volatile void *)(&dev->intr[channel].st); in gdma_ll_tx_get_interrupt_status_reg()
Dgpio_ll.h110 *status = hw->pcpu_int.intr; in gpio_ll_get_intr_status()
/hal_espressif-3.7.0/components/esp_hw_support/
Dintr_alloc.c537 int intr = get_available_int(flags, cpu, force, source); in esp_intr_alloc_intrstatus() local
538 if (intr == -1) { in esp_intr_alloc_intrstatus()
545 vector_desc_t *vd = get_desc_for_int(intr, cpu); in esp_intr_alloc_intrstatus()
572 esp_cpu_intr_set_handler(intr, (esp_cpu_intr_handler_t)shared_intr_isr, vd); in esp_intr_alloc_intrstatus()
587 esp_cpu_intr_set_handler(intr, (esp_cpu_intr_handler_t)non_shared_intr_isr, ns_isr_arg); in esp_intr_alloc_intrstatus()
589 esp_cpu_intr_set_handler(intr, (esp_cpu_intr_handler_t)handler, arg); in esp_intr_alloc_intrstatus()
594 esp_cpu_intr_edge_ack(intr); in esp_intr_alloc_intrstatus()
601 non_iram_int_mask[cpu] &= ~(1<<intr); in esp_intr_alloc_intrstatus()
604 non_iram_int_mask[cpu] |= (1<<intr); in esp_intr_alloc_intrstatus()
607 esp_rom_route_intr_matrix(cpu, source, intr); in esp_intr_alloc_intrstatus()
[all …]
/hal_espressif-3.7.0/components/driver/spi/gpspi/
Dspi_slave.c55 intr_handle_t intr; member
120 …ost(host->id), host->intr_flags | ESP_INTR_FLAG_INTRDISABLED, spi_intr, (void *)host, &host->intr); in ipc_isr_reg_to_core()
236 …g->intr_flags | ESP_INTR_FLAG_INTRDISABLED, spi_intr, (void *)spihost[host], &spihost[host]->intr); in spi_slave_initialize()
309 esp_intr_free(spihost[host]->intr); in spi_slave_free()
339 esp_intr_disable(spihost[host]->intr); in spi_slave_queue_reset()
381 esp_intr_enable(spihost[host]->intr); in spi_slave_queue_trans()
440 esp_intr_enable(host->intr); in spi_slave_restart_after_dmareset()
488 esp_intr_disable(host->intr); in spi_intr()
496 esp_intr_disable(host->intr); in spi_intr()
504 esp_intr_enable(host->intr); in spi_intr()
Dspi_master.c143 intr_handle_t intr; member
204 …host->id), bus_attr->bus_cfg.intr_flags | ESP_INTR_FLAG_INTRDISABLED, spi_intr, host, &host->intr); in ipc_isr_reg_to_core()
245 …(host_id), bus_attr->bus_cfg.intr_flags | ESP_INTR_FLAG_INTRDISABLED, spi_intr, host, &host->intr); in spi_master_init_driver()
279 if (host->intr) { in spi_master_init_driver()
280 esp_intr_free(host->intr); in spi_master_init_driver()
302 if (host->intr) { in spi_master_deinit_driver()
303 esp_intr_free(host->intr); in spi_master_deinit_driver()
576 esp_intr_enable(((spi_host_t*)host)->intr); in spi_bus_intr_enable()
582 esp_intr_disable(((spi_host_t*)host)->intr); in spi_bus_intr_disable()
Dspi_slave_hd.c31 intr_handle_t intr; member
174 (void *)host, &host->intr); in spi_slave_hd_init()
188 (void *)host, &host->intr); in spi_slave_hd_init()
238 esp_intr_free(host->intr); in spi_slave_hd_deinit()
/hal_espressif-3.7.0/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/
Dtest_intr_alloc.c129 intr_handle_t intr; variable
133 TEST_ESP_OK(esp_intr_alloc(test_intr_source, isr_flags, test_isr, NULL, &intr));
134 TEST_ESP_OK(esp_intr_free(intr));
137 TEST_ESP_OK(esp_intr_alloc(test_intr_source, isr_flags, test_isr, NULL, &intr));
138 TEST_ESP_OK(esp_intr_free(intr));
/hal_espressif-3.7.0/components/xtensa/
Dxtensa_intr.c120 bool xt_int_has_handler(int intr, int cpu) in xt_int_has_handler() argument
122 return (_xt_interrupt_table[intr*portNUM_PROCESSORS+cpu].handler != xt_unhandled_interrupt); in xt_int_has_handler()
/hal_espressif-3.7.0/components/esp_hw_support/dma/
Dasync_memcpy_impl_cp_dma.c47 …MA_COPY_INTR_SOURCE, ESP_INTR_FLAG_IRAM, async_memcpy_impl_default_isr_handler, impl, &impl->intr); in async_memcpy_impl_init()
56 ret = esp_intr_free(impl->intr); in async_memcpy_impl_deinit()
Dgdma.c410 ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed"); in gdma_register_tx_event_callbacks()
446 ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed"); in gdma_register_rx_event_callbacks()
661 if (dma_channel->intr) { in gdma_del_tx_channel()
662 esp_intr_free(dma_channel->intr); in gdma_del_tx_channel()
691 if (dma_channel->intr) { in gdma_del_rx_channel()
692 esp_intr_free(dma_channel->intr); in gdma_del_rx_channel()
772 intr_handle_t intr = NULL; in gdma_install_rx_interrupt() local
775 gdma_default_rx_isr, rx_chan, &intr); in gdma_install_rx_interrupt()
777 rx_chan->base.intr = intr; in gdma_install_rx_interrupt()
799 intr_handle_t intr = NULL; in gdma_install_tx_interrupt() local
[all …]
Dgdma_priv.h63 intr_handle_t intr; // per-channel interrupt handle member
/hal_espressif-3.7.0/components/soc/esp32s3/include/soc/
Dgpio_struct.h117 … uint32_t intr : 22; /*GPIO32-48 PRO & APP CPU interrupt status*/ member
124 …uint32_t intr : 22; /*GPIO32-48 PRO & APP CPU non-maskable inter… member
131 uint32_t intr : 22; member
/hal_espressif-3.7.0/components/soc/esp32s2/include/soc/
Dgpio_struct.h115 uint32_t intr: 22; member
122 uint32_t intr: 22; member
129 uint32_t intr: 22; member
/hal_espressif-3.7.0/components/xtensa/include/xtensa/
Dxtensa_api.h137 bool xt_int_has_handler(int intr, int cpu);
/hal_espressif-3.7.0/components/esp_hw_support/port/include/
Desp_async_memcpy_impl.h36 intr_handle_t intr; // CP DMA interrupt handle member
/hal_espressif-3.7.0/components/soc/esp32c3/include/soc/
Dgpio_struct.h119 uint32_t intr: 26; member
126 uint32_t intr: 26; member
133 uint32_t intr: 26; member
Dgdma_struct.h92 } intr[3]; member
/hal_espressif-3.7.0/components/hal/esp32/include/hal/
Dgpio_ll.h249 …) ? HAL_FORCE_READ_U32_REG_FIELD(hw->pcpu_int1, intr) : HAL_FORCE_READ_U32_REG_FIELD(hw->acpu_int1… in gpio_ll_get_intr_status_high()
/hal_espressif-3.7.0/components/soc/esp32c2/include/soc/
Dgdma_struct.h92 } intr[1]; member
/hal_espressif-3.7.0/components/hal/esp32s2/include/hal/
Dgpio_ll.h117 *status = hw->pcpu_int1.intr; in gpio_ll_get_intr_status_high()
/hal_espressif-3.7.0/components/hal/esp32s3/include/hal/
Dgpio_ll.h130 *status = hw->pcpu_int1.intr; in gpio_ll_get_intr_status_high()

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