| /hal_espressif-3.7.0/components/hal/esp32/include/hal/ |
| D | emac_ll.h | 166 static inline void emac_ll_write_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_write_enable() argument
168 mac_regs->emacgmiiaddr.miiwrite = enable; in emac_ll_write_enable()
177 static inline void emac_ll_watchdog_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_watchdog_enable() argument
179 mac_regs->gmacconfig.watchdog = !enable; in emac_ll_watchdog_enable()
182 static inline void emac_ll_jabber_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_jabber_enable() argument
184 mac_regs->gmacconfig.jabber = !enable; in emac_ll_jabber_enable()
192 static inline void emac_ll_carrier_sense_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_carrier_sense_enable() argument
194 mac_regs->gmacconfig.disablecrs = !enable; in emac_ll_carrier_sense_enable()
207 static inline void emac_ll_recv_own_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_recv_own_enable() argument
209 mac_regs->gmacconfig.rxown = !enable; in emac_ll_recv_own_enable()
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| D | rwdt_ll.h | 142 FORCE_INLINE_ATTR void rwdt_ll_set_edge_intr(rtc_cntl_dev_t *hw, bool enable) in rwdt_ll_set_edge_intr() argument
144 hw->wdt_config0.edge_int_en = (enable) ? 1 : 0; in rwdt_ll_set_edge_intr()
153 FORCE_INLINE_ATTR void rwdt_ll_set_level_intr(rtc_cntl_dev_t *hw, bool enable) in rwdt_ll_set_level_intr() argument
155 hw->wdt_config0.level_int_en = (enable) ? 1 : 0; in rwdt_ll_set_level_intr()
190 FORCE_INLINE_ATTR void rwdt_ll_set_flashboot_en(rtc_cntl_dev_t* hw, bool enable) in rwdt_ll_set_flashboot_en() argument
192 hw->wdt_config0.flashboot_mod_en = (enable) ? 1 : 0; in rwdt_ll_set_flashboot_en()
201 FORCE_INLINE_ATTR void rwdt_ll_set_procpu_reset_en(rtc_cntl_dev_t* hw, bool enable) in rwdt_ll_set_procpu_reset_en() argument
203 hw->wdt_config0.procpu_reset_en = (enable) ? 1 : 0; in rwdt_ll_set_procpu_reset_en()
212 FORCE_INLINE_ATTR void rwdt_ll_set_appcpu_reset_en(rtc_cntl_dev_t* hw, bool enable) in rwdt_ll_set_appcpu_reset_en() argument
214 hw->wdt_config0.appcpu_reset_en = (enable) ? 1 : 0; in rwdt_ll_set_appcpu_reset_en()
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| D | brownout_ll.h | 26 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
28 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
36 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
38 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
91 static inline void brownout_ll_intr_enable(bool enable) in brownout_ll_intr_enable() argument
93 RTCCNTL.int_ena.rtc_brown_out = enable; in brownout_ll_intr_enable()
101 static inline void brownout_ll_ana_reset_enable(bool enable) in brownout_ll_ana_reset_enable() argument
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| /hal_espressif-3.7.0/components/hal/esp32h2/include/hal/ |
| D | rwdt_ll.h | 43 #define rwdt_ll_set_flashboot_en(hw, enable) \ argument
44 lpwdt_ll_set_flashboot_en(hw, enable)
46 #define rwdt_ll_set_procpu_reset_en(hw, enable) \ argument
47 lpwdt_ll_set_procpu_reset_en(hw, enable)
49 #define rwdt_ll_set_appcpu_reset_en(hw, enable) \ argument
50 lpwdt_ll_set_appcpu_reset_en(hw, enable)
52 #define rwdt_ll_set_pause_in_sleep_en(hw, enable) \ argument
53 lpwdt_ll_set_pause_in_sleep_en(hw, enable)
55 #define rwdt_ll_set_chip_reset_en(hw, enable) \ argument
56 lpwdt_ll_set_chip_reset_en(hw, enable)
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| D | brownout_ll.h | 28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 LP_ANA_PERI.bod_mode0_cntl.bod_mode0_close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 LP_ANA_PERI.bod_mode0_cntl.bod_mode0_pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
94 static inline void brownout_ll_intr_enable(bool enable) in brownout_ll_intr_enable() argument
96 LP_ANA_PERI.int_ena.bod_mode0_int_ena = enable; in brownout_ll_intr_enable()
104 static inline void brownout_ll_ana_reset_enable(bool enable) in brownout_ll_ana_reset_enable() argument
106 LP_ANA_PERI.bod_mode1_cntl.bod_mode1_reset_ena = enable; in brownout_ll_ana_reset_enable()
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| D | apm_ll.h | 102 static inline void apm_tee_ll_clk_gating_enable(bool enable) in apm_tee_ll_clk_gating_enable() argument
104 if (enable) { in apm_tee_ll_clk_gating_enable()
117 static inline void apm_hp_ll_region_filter_enable(uint32_t regn_num, bool enable) in apm_hp_ll_region_filter_enable() argument
119 if (enable) { in apm_hp_ll_region_filter_enable()
132 static inline void apm_hp_ll_m_filter_enable(apm_ll_hp_access_path_t hp_m_path, bool enable) in apm_hp_ll_m_filter_enable() argument
134 if (enable) { in apm_hp_ll_m_filter_enable()
219 static inline void apm_hp_ll_m_interrupt_enable(apm_ll_hp_access_path_t hp_m_path, bool enable) in apm_hp_ll_m_interrupt_enable() argument
221 if (enable) { in apm_hp_ll_m_interrupt_enable()
233 static inline void apm_hp_ll_clk_gating_enable(bool enable) in apm_hp_ll_clk_gating_enable() argument
235 if (enable) { in apm_hp_ll_clk_gating_enable()
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| /hal_espressif-3.7.0/components/hal/esp32c6/include/hal/ |
| D | rwdt_ll.h | 42 #define rwdt_ll_set_flashboot_en(hw, enable) \ argument
43 lpwdt_ll_set_flashboot_en(hw, enable)
45 #define rwdt_ll_set_procpu_reset_en(hw, enable) \ argument
46 lpwdt_ll_set_procpu_reset_en(hw, enable)
48 #define rwdt_ll_set_appcpu_reset_en(hw, enable) \ argument
49 lpwdt_ll_set_appcpu_reset_en(hw, enable)
51 #define rwdt_ll_set_pause_in_sleep_en(hw, enable) \ argument
52 lpwdt_ll_set_pause_in_sleep_en(hw, enable)
54 #define rwdt_ll_set_chip_reset_en(hw, enable) \ argument
55 lpwdt_ll_set_chip_reset_en(hw, enable)
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| D | brownout_ll.h | 28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 LP_ANA_PERI.bod_mode0_cntl.bod_mode0_close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 LP_ANA_PERI.bod_mode0_cntl.bod_mode0_pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
94 static inline void brownout_ll_intr_enable(bool enable) in brownout_ll_intr_enable() argument
96 LP_ANA_PERI.int_ena.bod_mode0 = enable; in brownout_ll_intr_enable()
104 static inline void brownout_ll_ana_reset_enable(bool enable) in brownout_ll_ana_reset_enable() argument
106 LP_ANA_PERI.bod_mode1_cntl.bod_mode1_reset_ena = enable; in brownout_ll_ana_reset_enable()
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| D | apm_ll.h | 102 static inline void apm_tee_ll_clk_gating_enable(bool enable) in apm_tee_ll_clk_gating_enable() argument
104 if (enable) { in apm_tee_ll_clk_gating_enable()
117 static inline void apm_hp_ll_region_filter_enable(uint32_t regn_num, bool enable) in apm_hp_ll_region_filter_enable() argument
119 if (enable) { in apm_hp_ll_region_filter_enable()
132 static inline void apm_hp_ll_m_filter_enable(apm_ll_hp_access_path_t hp_m_path, bool enable) in apm_hp_ll_m_filter_enable() argument
134 if (enable) { in apm_hp_ll_m_filter_enable()
219 static inline void apm_hp_ll_m_interrupt_enable(apm_ll_hp_access_path_t hp_m_path, bool enable) in apm_hp_ll_m_interrupt_enable() argument
221 if (enable) { in apm_hp_ll_m_interrupt_enable()
233 static inline void apm_hp_ll_clk_gating_enable(bool enable) in apm_hp_ll_clk_gating_enable() argument
235 if (enable) { in apm_hp_ll_clk_gating_enable()
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| D | lpwdt_ll.h | 179 FORCE_INLINE_ATTR void lpwdt_ll_set_flashboot_en(lp_wdt_dev_t *hw, bool enable) in lpwdt_ll_set_flashboot_en() argument
181 hw->config0.wdt_flashboot_mod_en = (enable) ? 1 : 0; in lpwdt_ll_set_flashboot_en()
190 FORCE_INLINE_ATTR void lpwdt_ll_set_procpu_reset_en(lp_wdt_dev_t *hw, bool enable) in lpwdt_ll_set_procpu_reset_en() argument
192 hw->config0.wdt_procpu_reset_en = (enable) ? 1 : 0; in lpwdt_ll_set_procpu_reset_en()
201 FORCE_INLINE_ATTR void lpwdt_ll_set_appcpu_reset_en(lp_wdt_dev_t *hw, bool enable) in lpwdt_ll_set_appcpu_reset_en() argument
203 hw->config0.wdt_appcpu_reset_en = (enable) ? 1 : 0; in lpwdt_ll_set_appcpu_reset_en()
212 FORCE_INLINE_ATTR void lpwdt_ll_set_pause_in_sleep_en(lp_wdt_dev_t *hw, bool enable) in lpwdt_ll_set_pause_in_sleep_en() argument
214 hw->config0.wdt_pause_in_slp = (enable) ? 1 : 0; in lpwdt_ll_set_pause_in_sleep_en()
226 FORCE_INLINE_ATTR void lpwdt_ll_set_chip_reset_en(lp_wdt_dev_t *hw, bool enable) in lpwdt_ll_set_chip_reset_en() argument
228 hw->config0.wdt_chip_reset_en = (enable) ? 1 : 0; in lpwdt_ll_set_chip_reset_en()
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| /hal_espressif-3.7.0/components/hal/ |
| D | apm_hal.c | 16 void apm_tee_hal_clk_gating_enable(bool enable) in apm_tee_hal_clk_gating_enable() argument
18 apm_tee_ll_clk_gating_enable(enable); in apm_tee_hal_clk_gating_enable()
21 void apm_hp_hal_region_filter_enable(uint32_t regn_num, bool enable) in apm_hp_hal_region_filter_enable() argument
23 apm_hp_ll_region_filter_enable(regn_num, enable); in apm_hp_hal_region_filter_enable()
26 void apm_hp_hal_m_filter_enable(apm_ll_hp_access_path_t hp_m_path, bool enable) in apm_hp_hal_m_filter_enable() argument
28 apm_hp_ll_m_filter_enable(hp_m_path, enable); in apm_hp_hal_m_filter_enable()
55 void apm_hp_hal_m_interrupt_enable(apm_ll_hp_access_path_t hp_m_path, bool enable) in apm_hp_hal_m_interrupt_enable() argument
57 apm_hp_ll_m_interrupt_enable(hp_m_path, enable); in apm_hp_hal_m_interrupt_enable()
60 void apm_hp_hal_clk_gating_enable(bool enable) in apm_hp_hal_clk_gating_enable() argument
62 apm_hp_ll_clk_gating_enable(enable); in apm_hp_hal_clk_gating_enable()
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| D | spi_slave_hal.c | 10 … spi_dma_ll_rx_enable_burst_data(dev, chan, enable) gdma_ll_rx_enable_data_burst(&GDMA, ch… argument
11 … spi_dma_ll_tx_enable_burst_data(dev, chan, enable) gdma_ll_tx_enable_data_burst(&GDMA, ch… argument
12 …i_dma_ll_rx_enable_burst_desc(dev, chan, enable) gdma_ll_rx_enable_descriptor_burst(&GDMA,… argument
13 …i_dma_ll_tx_enable_burst_desc(dev, chan, enable) gdma_ll_tx_enable_descriptor_burst(&GDMA,… argument
14 …dma_ll_enable_out_auto_wrback(dev, chan, enable) gdma_ll_tx_enable_auto_write_back(&GDMA,… argument
15 … spi_dma_ll_set_out_eof_generation(dev, chan, enable) gdma_ll_tx_set_eof_mode(&GDMA, chan… argument
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| /hal_espressif-3.7.0/components/hal/esp32c2/include/hal/ |
| D | brownout_ll.h | 28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
94 static inline void brownout_ll_intr_enable(bool enable) in brownout_ll_intr_enable() argument
96 RTCCNTL.int_ena.rtc_brown_out = enable; in brownout_ll_intr_enable()
104 static inline void brownout_ll_ana_reset_enable(bool enable) in brownout_ll_ana_reset_enable() argument
106 RTCCNTL.brown_out.ana_rst_en = enable; in brownout_ll_ana_reset_enable()
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| /hal_espressif-3.7.0/components/hal/esp32c3/include/hal/ |
| D | brownout_ll.h | 28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
94 static inline void brownout_ll_intr_enable(bool enable) in brownout_ll_intr_enable() argument
96 RTCCNTL.int_ena.rtc_brown_out = enable; in brownout_ll_intr_enable()
104 static inline void brownout_ll_ana_reset_enable(bool enable) in brownout_ll_ana_reset_enable() argument
106 RTCCNTL.brown_out.ana_rst_en = enable; in brownout_ll_ana_reset_enable()
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| /hal_espressif-3.7.0/components/hal/esp32s3/include/hal/ |
| D | brownout_ll.h | 28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
94 static inline void brownout_ll_intr_enable(bool enable) in brownout_ll_intr_enable() argument
96 RTCCNTL.int_ena.rtc_brown_out = enable; in brownout_ll_intr_enable()
104 static inline void brownout_ll_ana_reset_enable(bool enable) in brownout_ll_ana_reset_enable() argument
106 RTCCNTL.brown_out.ana_rst_en = enable; in brownout_ll_ana_reset_enable()
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| D | rmt_ll.h | 50 static inline void rmt_ll_enable_periph_clock(rmt_dev_t *dev, bool enable) in rmt_ll_enable_periph_clock() argument
52 dev->sys_conf.clk_en = enable; // register clock gating in rmt_ll_enable_periph_clock()
53 dev->sys_conf.mem_clk_force_on = enable; // memory clock gating in rmt_ll_enable_periph_clock()
62 static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, bool enable) in rmt_ll_power_down_mem() argument
64 dev->sys_conf.mem_force_pu = !enable; in rmt_ll_power_down_mem()
65 dev->sys_conf.mem_force_pd = enable; in rmt_ll_power_down_mem()
74 static inline void rmt_ll_enable_mem_access_nonfifo(rmt_dev_t *dev, bool enable) in rmt_ll_enable_mem_access_nonfifo() argument
76 dev->sys_conf.apb_fifo_mask = enable; in rmt_ll_enable_mem_access_nonfifo()
178 static inline void rmt_ll_tx_enable_dma(rmt_dev_t *dev, uint32_t channel, bool enable) in rmt_ll_tx_enable_dma() argument
181 dev->chnconf0[channel].dma_access_en_chn = enable; in rmt_ll_tx_enable_dma()
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| /hal_espressif-3.7.0/components/bootloader_support/src/esp32c6/ |
| D | bootloader_soc.c | 11 void bootloader_ana_super_wdt_reset_config(bool enable) in bootloader_ana_super_wdt_reset_config() argument
14 assert(enable); in bootloader_ana_super_wdt_reset_config()
18 void bootloader_ana_bod_reset_config(bool enable) in bootloader_ana_bod_reset_config() argument
22 if (enable) { in bootloader_ana_bod_reset_config()
30 void bootloader_ana_clock_glitch_reset_config(bool enable) in bootloader_ana_clock_glitch_reset_config() argument
32 (void)enable; in bootloader_ana_clock_glitch_reset_config()
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| /hal_espressif-3.7.0/components/bootloader_support/src/esp32h2/ |
| D | bootloader_soc.c | 9 void bootloader_ana_super_wdt_reset_config(bool enable) in bootloader_ana_super_wdt_reset_config() argument
12 assert(enable); in bootloader_ana_super_wdt_reset_config()
16 void bootloader_ana_bod_reset_config(bool enable) in bootloader_ana_bod_reset_config() argument
20 if (enable) { in bootloader_ana_bod_reset_config()
28 void bootloader_ana_clock_glitch_reset_config(bool enable) in bootloader_ana_clock_glitch_reset_config() argument
30 (void)enable; in bootloader_ana_clock_glitch_reset_config()
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| /hal_espressif-3.7.0/components/bootloader_support/src/esp32c2/ |
| D | bootloader_soc.c | 10 void bootloader_ana_super_wdt_reset_config(bool enable) in bootloader_ana_super_wdt_reset_config() argument
14 if (enable) { in bootloader_ana_super_wdt_reset_config()
21 void bootloader_ana_bod_reset_config(bool enable) in bootloader_ana_bod_reset_config() argument
25 if (enable) { in bootloader_ana_bod_reset_config()
33 void bootloader_ana_clock_glitch_reset_config(bool enable) in bootloader_ana_clock_glitch_reset_config() argument
35 (void)enable; in bootloader_ana_clock_glitch_reset_config()
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| /hal_espressif-3.7.0/components/esp_hw_support/ |
| D | modem_clock.c | 58 static void IRAM_ATTR modem_clock_wifi_mac_configure(modem_clock_context_t *ctx, bool enable) in modem_clock_wifi_mac_configure() argument
60 if (enable) { in modem_clock_wifi_mac_configure()
61 modem_syscon_ll_enable_wifi_apb_clock(ctx->hal->syscon_dev, enable); in modem_clock_wifi_mac_configure()
62 modem_syscon_ll_enable_wifi_mac_clock(ctx->hal->syscon_dev, enable); in modem_clock_wifi_mac_configure()
66 static void IRAM_ATTR modem_clock_wifi_bb_configure(modem_clock_context_t *ctx, bool enable) in modem_clock_wifi_bb_configure() argument
68 if (enable) { in modem_clock_wifi_bb_configure()
69 modem_syscon_ll_clk_wifibb_configure(ctx->hal->syscon_dev, enable); in modem_clock_wifi_bb_configure()
75 static void IRAM_ATTR modem_clock_ble_mac_configure(modem_clock_context_t *ctx, bool enable) in modem_clock_ble_mac_configure() argument
77 modem_syscon_ll_enable_etm_clock(ctx->hal->syscon_dev, enable); in modem_clock_ble_mac_configure()
78 modem_syscon_ll_enable_modem_sec_clock(ctx->hal->syscon_dev, enable); in modem_clock_ble_mac_configure()
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| /hal_espressif-3.7.0/components/bootloader_support/src/esp32c3/ |
| D | bootloader_soc.c | 10 void bootloader_ana_super_wdt_reset_config(bool enable) in bootloader_ana_super_wdt_reset_config() argument
14 if (enable) { in bootloader_ana_super_wdt_reset_config()
21 void bootloader_ana_bod_reset_config(bool enable) in bootloader_ana_bod_reset_config() argument
25 if (enable) { in bootloader_ana_bod_reset_config()
32 void bootloader_ana_clock_glitch_reset_config(bool enable) in bootloader_ana_clock_glitch_reset_config() argument
36 if (enable) { in bootloader_ana_clock_glitch_reset_config()
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| /hal_espressif-3.7.0/components/bootloader_support/src/esp32s3/ |
| D | bootloader_soc.c | 10 void bootloader_ana_super_wdt_reset_config(bool enable) in bootloader_ana_super_wdt_reset_config() argument
14 if (enable) { in bootloader_ana_super_wdt_reset_config()
21 void bootloader_ana_bod_reset_config(bool enable) in bootloader_ana_bod_reset_config() argument
25 if (enable) { in bootloader_ana_bod_reset_config()
32 void bootloader_ana_clock_glitch_reset_config(bool enable) in bootloader_ana_clock_glitch_reset_config() argument
36 if (enable) { in bootloader_ana_clock_glitch_reset_config()
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| /hal_espressif-3.7.0/components/hal/esp32s2/include/hal/ |
| D | brownout_ll.h | 28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
95 static inline void brownout_ll_intr_enable(bool enable) in brownout_ll_intr_enable() argument
97 RTCCNTL.int_ena.rtc_brown_out = enable; in brownout_ll_intr_enable()
105 static inline void brownout_ll_ana_reset_enable(bool enable) in brownout_ll_ana_reset_enable() argument
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| D | dac_ll.h | 99 static inline void dac_ll_rtc_sync_by_adc(bool enable) in dac_ll_rtc_sync_by_adc() argument
101 SENS.sar_amp_ctrl3.sar1_dac_xpd_fsm = enable; in dac_ll_rtc_sync_by_adc()
129 static inline void dac_ll_cw_enable_channel(dac_channel_t channel, bool enable) in dac_ll_cw_enable_channel() argument
132 SENS.sar_dac_ctrl2.dac_cw_en1 = enable; in dac_ll_cw_enable_channel()
134 SENS.sar_dac_ctrl2.dac_cw_en2 = enable; in dac_ll_cw_enable_channel()
221 static inline void dac_ll_digi_clk_inv(bool enable) in dac_ll_digi_clk_inv() argument
223 SENS.sar_dac_ctrl1.dac_clk_inv = enable; in dac_ll_digi_clk_inv()
229 static inline void dac_ll_digi_enable_dma(bool enable) in dac_ll_digi_enable_dma() argument
231 SENS.sar_dac_ctrl1.dac_dig_force = enable; in dac_ll_digi_enable_dma()
232 APB_SARADC.apb_dac_ctrl.apb_dac_trans = enable; in dac_ll_digi_enable_dma()
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| D | rwdt_ll.h | 181 FORCE_INLINE_ATTR void rwdt_ll_set_flashboot_en(rtc_cntl_dev_t* hw, bool enable) in rwdt_ll_set_flashboot_en() argument
183 hw->wdt_config0.flashboot_mod_en = (enable) ? 1 : 0; in rwdt_ll_set_flashboot_en()
192 FORCE_INLINE_ATTR void rwdt_ll_set_procpu_reset_en(rtc_cntl_dev_t* hw, bool enable) in rwdt_ll_set_procpu_reset_en() argument
194 hw->wdt_config0.procpu_reset_en = (enable) ? 1 : 0; in rwdt_ll_set_procpu_reset_en()
203 FORCE_INLINE_ATTR void rwdt_ll_set_appcpu_reset_en(rtc_cntl_dev_t* hw, bool enable) in rwdt_ll_set_appcpu_reset_en() argument
205 hw->wdt_config0.appcpu_reset_en = (enable) ? 1 : 0; in rwdt_ll_set_appcpu_reset_en()
214 FORCE_INLINE_ATTR void rwdt_ll_set_pause_in_sleep_en(rtc_cntl_dev_t* hw, bool enable) in rwdt_ll_set_pause_in_sleep_en() argument
216 hw->wdt_config0.pause_in_slp = (enable) ? 1 : 0; in rwdt_ll_set_pause_in_sleep_en()
228 FORCE_INLINE_ATTR void rwdt_ll_set_chip_reset_en(rtc_cntl_dev_t* hw, bool enable) in rwdt_ll_set_chip_reset_en() argument
230 hw->wdt_config0.chip_reset_en = (enable) ? 1 : 0; in rwdt_ll_set_chip_reset_en()
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