| /hal_espressif-3.7.0/components/hal/esp32c6/include/hal/ |
| D | clk_tree_ll.h | 537 uint32_t div_num = 0; in clk_ll_mspi_fast_set_hs_divider() local
540 div_num = 3; in clk_ll_mspi_fast_set_hs_divider()
543 div_num = 4; in clk_ll_mspi_fast_set_hs_divider()
546 div_num = 5; in clk_ll_mspi_fast_set_hs_divider()
552 HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.mspi_clk_conf, mspi_fast_hs_div_num, div_num); in clk_ll_mspi_fast_set_hs_divider()
564 uint32_t div_num = 0; in clk_ll_mspi_fast_set_ls_divider() local
567 div_num = 0; in clk_ll_mspi_fast_set_ls_divider()
570 div_num = 1; in clk_ll_mspi_fast_set_ls_divider()
573 div_num = 2; in clk_ll_mspi_fast_set_ls_divider()
579 HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.mspi_clk_conf, mspi_fast_ls_div_num, div_num); in clk_ll_mspi_fast_set_ls_divider()
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| D | adc_ll.h | 293 static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a) in adc_ll_digi_controller_clk_div() argument
295 HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.saradc_clkm_conf, saradc_clkm_div_num, div_num); in adc_ll_digi_controller_clk_div()
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| /hal_espressif-3.7.0/components/hal/esp32s3/include/hal/ |
| D | lcd_ll.h | 80 static inline void lcd_ll_set_group_clock_coeff(lcd_cam_dev_t *dev, int div_num, int div_a, int div… in lcd_ll_set_group_clock_coeff() argument
83 HAL_ASSERT(div_num >= 2 && div_num <= LCD_LL_CLK_FRAC_DIV_N_MAX); in lcd_ll_set_group_clock_coeff()
85 if (div_num >= LCD_LL_CLK_FRAC_DIV_N_MAX) { in lcd_ll_set_group_clock_coeff()
86 div_num = 0; in lcd_ll_set_group_clock_coeff()
88 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->lcd_clock, lcd_clkm_div_num, div_num); in lcd_ll_set_group_clock_coeff()
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| D | adc_ll.h | 355 static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a) in adc_ll_digi_controller_clk_div() argument
357 HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.apb_adc_clkm_conf, clkm_div_num, div_num); in adc_ll_digi_controller_clk_div()
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| /hal_espressif-3.7.0/components/driver/deprecated/esp32s2/ |
| D | dac_legacy.c | 62 …ESP_RETURN_ON_FALSE(cfg->dig_clk.div_num < 256, ESP_ERR_INVALID_ARG, TAG, "DAC clk div_num error"); in dac_digi_controller_config()
84 adc_ll_digi_controller_clk_div(cfg->dig_clk.div_num, cfg->dig_clk.div_b, cfg->dig_clk.div_a); in dac_digi_controller_config()
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| /hal_espressif-3.7.0/components/hal/include/hal/ |
| D | adc_types.h | 217 uint32_t div_num; /*!<Division factor. Range: 0 ~ 255. member
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| /hal_espressif-3.7.0/components/hal/esp32c2/include/hal/ |
| D | adc_ll.h | 147 static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a) in adc_ll_digi_controller_clk_div() argument
149 …_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_apb_adc_clkm_conf, saradc_reg_clkm_div_num, div_num); in adc_ll_digi_controller_clk_div()
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| /hal_espressif-3.7.0/components/soc/esp32/include/soc/ |
| D | emac_ext_struct.h | 25 uint32_t div_num : 4; member
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| /hal_espressif-3.7.0/components/hal/esp32h2/include/hal/ |
| D | adc_ll.h | 293 static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a) in adc_ll_digi_controller_clk_div() argument
295 HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.saradc_clkm_conf, saradc_clkm_div_num, div_num); in adc_ll_digi_controller_clk_div()
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| /hal_espressif-3.7.0/components/hal/esp32c3/include/hal/ |
| D | adc_ll.h | 289 static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a) in adc_ll_digi_controller_clk_div() argument
291 HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.apb_adc_clkm_conf, clkm_div_num, div_num); in adc_ll_digi_controller_clk_div()
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| /hal_espressif-3.7.0/components/hal/esp32s2/include/hal/ |
| D | adc_ll.h | 350 static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a) in adc_ll_digi_controller_clk_div() argument
352 HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.apb_adc_clkm_conf, clkm_div_num, div_num); in adc_ll_digi_controller_clk_div()
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| /hal_espressif-3.7.0/components/hal/esp32/include/hal/ |
| D | emac_ll.h | 597 ext_regs->ex_clkout_conf.div_num = 0; in emac_ll_clock_enable_rmii_output()
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