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/hal_espressif-3.7.0/components/xtensa/trax/
Dtraceparse.py181 def process_forward(self, cur_pc): argument
190 next_pc = cur_pc
192 next_pc = cur_pc ^ self.uaddr
194 self.pc_start = cur_pc
198 self.pc_start = cur_pc
199 self.pc_end = cur_pc + self.icnt + 1
208 def process_backward(self, cur_pc): argument
222 prev_pc = cur_pc
223 self.pc_target = cur_pc