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/hal_espressif-3.7.0/components/bt/esp_ble_mesh/mesh_common/include/
Dmesh_atomic.h155 #define BLE_MESH_ATOMIC_MASK(bit) (1 << ((bit) & (BLE_MESH_ATOMIC_BITS - 1))) argument
156 #define BLE_MESH_ATOMIC_ELEM(addr, bit) ((addr) + ((bit) / BLE_MESH_ATOMIC_BITS)) argument
189 static inline int bt_mesh_atomic_test_bit(const bt_mesh_atomic_t *target, int bit) in bt_mesh_atomic_test_bit() argument
191 bt_mesh_atomic_val_t val = bt_mesh_atomic_get(BLE_MESH_ATOMIC_ELEM(target, bit)); in bt_mesh_atomic_test_bit()
193 return (1 & (val >> (bit & (BLE_MESH_ATOMIC_BITS - 1)))); in bt_mesh_atomic_test_bit()
207 static inline int bt_mesh_atomic_test_and_clear_bit(bt_mesh_atomic_t *target, int bit) in bt_mesh_atomic_test_and_clear_bit() argument
209 bt_mesh_atomic_val_t mask = BLE_MESH_ATOMIC_MASK(bit); in bt_mesh_atomic_test_and_clear_bit()
212 old = bt_mesh_atomic_and(BLE_MESH_ATOMIC_ELEM(target, bit), ~mask); in bt_mesh_atomic_test_and_clear_bit()
228 static inline int bt_mesh_atomic_test_and_set_bit(bt_mesh_atomic_t *target, int bit) in bt_mesh_atomic_test_and_set_bit() argument
230 bt_mesh_atomic_val_t mask = BLE_MESH_ATOMIC_MASK(bit); in bt_mesh_atomic_test_and_set_bit()
[all …]
/hal_espressif-3.7.0/components/wpa_supplicant/src/utils/
Dbitfield.c40 void bitfield_set(struct bitfield *bf, size_t bit) in bitfield_set() argument
42 if (bit >= bf->max_bits) in bitfield_set()
44 bf->bits[bit / 8] |= BIT(bit % 8); in bitfield_set()
48 void bitfield_clear(struct bitfield *bf, size_t bit) in bitfield_clear() argument
50 if (bit >= bf->max_bits) in bitfield_clear()
52 bf->bits[bit / 8] &= ~BIT(bit % 8); in bitfield_clear()
56 int bitfield_is_set(struct bitfield *bf, size_t bit) in bitfield_is_set() argument
58 if (bit >= bf->max_bits) in bitfield_is_set()
60 return !!(bf->bits[bit / 8] & BIT(bit % 8)); in bitfield_is_set()
Dbitfield.h16 void bitfield_set(struct bitfield *bf, size_t bit);
17 void bitfield_clear(struct bitfield *bf, size_t bit);
18 int bitfield_is_set(struct bitfield *bf, size_t bit);
/hal_espressif-3.7.0/components/esp_system/port/arch/riscv/
Dpanic_arch.c37 const uint32_t bit; member
56 const uint32_t bit = reg_bits[i].bit; in test_and_print_register_bits() local
57 if ((status & bit) == bit) { in test_and_print_register_bits()
84 .bit = EXTMEM_CORE0_DBUS_WR_ICACHE_ST, in print_cache_err_details()
88 .bit = EXTMEM_CORE0_DBUS_REJECT_ST, in print_cache_err_details()
92 .bit = EXTMEM_CORE0_DBUS_ACS_MSK_ICACHE_ST, in print_cache_err_details()
96 .bit = EXTMEM_CORE0_IBUS_REJECT_ST, in print_cache_err_details()
100 .bit = EXTMEM_CORE0_IBUS_WR_ICACHE_ST, in print_cache_err_details()
104 .bit = EXTMEM_CORE0_IBUS_ACS_MSK_ICACHE_ST, in print_cache_err_details()
112 .bit = EXTMEM_MMU_ENTRY_FAULT_ST, in print_cache_err_details()
[all …]
/hal_espressif-3.7.0/tools/esptool_py/docs/en/espefuse/inc/
Dsummary_ESP32-S3.rst14 …DIS_ICACHE (BLOCK0) Set this bit to disable Icache …
15 …DIS_DCACHE (BLOCK0) Set this bit to disable Dcache …
16 …DIS_TWAI (BLOCK0) Set this bit to disable CAN function …
36 …FORCE_SEND_RESUME (BLOCK0) Set this bit to force ROM code to send a resume…
45 …WAFER_VERSION_MINOR_HI (BLOCK1) WAFER_VERSION_MINOR most significant bit …
47 OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
57 …DIS_PAD_JTAG (BLOCK0) Set this bit to disable JTAG in the hard way. J…
59 …STRAP_JTAG_SEL (BLOCK0) Set this bit to enable selection between usb_to…
71 …DIS_DOWNLOAD_ICACHE (BLOCK0) Set this bit to disable Icache in download mode…
73 …DIS_DOWNLOAD_DCACHE (BLOCK0) Set this bit to disable Dcache in download mode…
[all …]
Dsummary_ESP32-C2.rst15 …DIS_DIRECT_BOOT (BLOCK0) This bit set means disable direct_boot mode …
18 …FORCE_SEND_RESUME (BLOCK0) Set this bit to force ROM code to send a resume…
35 …DIS_PAD_JTAG (BLOCK0) Set this bit to disable pad jtag …
45 …DIS_DOWNLOAD_ICACHE (BLOCK0) The bit be set to disable icache in download mo…
46 …DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) The bit be set to disable manual encryption …
50 …DIS_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download mode (boot_mod…
52 …ENABLE_SECURITY_DOWNLOAD (BLOCK0) Set this bit to enable secure UART download mod…
53 …SECURE_BOOT_EN (BLOCK0) The bit be set to enable secure boot …
55 …BLOCK_KEY0 (BLOCK3) BLOCK_KEY0 - 256-bits. 256-bit key of Flash Enc…
58 …BLOCK_KEY0_LOW_128 (BLOCK3) BLOCK_KEY0 - lower 128-bits. 128-bit key of Fla…
Dsummary_ESP32-S2.rst12 …ADC_CALIB (BLOCK2) 4 bit of ADC calibration …
34 …DIS_ICACHE (BLOCK0) Set this bit to disable Icache …
35 …DIS_DCACHE (BLOCK0) Set this bit to disable Dcache …
36 …DIS_TWAI (BLOCK0) Set this bit to disable the TWAI Controller fun…
40 …DIS_LEGACY_SPI_BOOT (BLOCK0) Set this bit to disable Legacy SPI boot mode …
65 …WAFER_VERSION_MINOR_HI (BLOCK1) WAFER_VERSION_MINOR most significant bit …
70 OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
90 …DIS_FORCE_DOWNLOAD (BLOCK0) Set this bit to disable the function that force…
105 …SECURE_BOOT_EN (BLOCK0) Set this bit to enable secure boot …
106 …SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Set this bit to enable aggressive secure boot k…
[all …]
Dsummary_ESP32-C3.rst32 …DIS_ICACHE (BLOCK0) Set this bit to disable Icache …
33 …DIS_TWAI (BLOCK0) Set this bit to disable CAN function …
47 …FORCE_SEND_RESUME (BLOCK0) Set this bit to force ROM code to send a resume…
56 …WAFER_VERSION_MINOR_HI (BLOCK1) WAFER_VERSION_MINOR most significant bit …
58 OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
68 …DIS_PAD_JTAG (BLOCK0) Set this bit to disable JTAG in the hard way. J…
78 …DIS_DOWNLOAD_ICACHE (BLOCK0) Set this bit to disable Icache in download mode…
80 …DIS_FORCE_DOWNLOAD (BLOCK0) Set this bit to disable the function that force…
82 …DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Set this bit to disable flash encryption when i…
95 …SECURE_BOOT_EN (BLOCK0) Set this bit to enable secure boot …
[all …]
Dsummary_ESP32-P4.rst18 …KM_HUK_GEN_STATE_LOW (BLOCK0) Set this bit to control validation of HUK gener…
20 …KM_HUK_GEN_STATE_HIGH (BLOCK0) Set this bit to control validation of HUK gener…
25 …KM_DEPLOY_ONLY_ONCE (BLOCK0) Set each bit to control whether corresponding k…
44 …DIS_SWD (BLOCK0) Set this bit to disable super-watchdog …
56 …FLASH_ECC_EN (BLOCK0) Set this bit to enable ecc for flash boot …
88 …SPI_DOWNLOAD_MSPI_DIS (BLOCK0) Set this bit to disable accessing MSPI flash/MS…
93 …FORCE_USE_KEY_MANAGER_KEY (BLOCK0) Set each bit to control whether corresponding k…
96 …FORCE_DISABLE_SW_INIT_KEY (BLOCK0) Set this bit to disable software written init k…
98 …XTS_KEY_LENGTH_256 (BLOCK0) Set this bit to configure flash encryption use …
164 …DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download via USB-OTG …
[all …]
/hal_espressif-3.7.0/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/
Dtest_ds.c405 for (int bit = 0; bit < 128; bit++) { variable
406 printf("Corrupting IV bit %d...\n", bit);
407 ds_data.iv[bit / 8] ^= 1 << (bit % 8);
420 ds_data.iv[bit / 8] ^= 1 << (bit % 8);
425 for (int bit = 0; bit < ETS_DS_C_LEN * 8; bit++) { variable
426 printf("Corrupting C bit %d...\n", bit);
427 ds_data.c[bit / 8] ^= 1 << (bit % 8);
440 ds_data.c[bit / 8] ^= 1 << (bit % 8);
/hal_espressif-3.7.0/components/esp_hw_support/test_apps/security_support/esp_hw_support_unity_tests/main/
Dtest_ds.c405 for (int bit = 0; bit < 128; bit++) { variable
406 printf("Corrupting IV bit %d...\n", bit);
407 ds_data.iv[bit / 8] ^= 1 << (bit % 8);
420 ds_data.iv[bit / 8] ^= 1 << (bit % 8);
425 for (int bit = 0; bit < ETS_DS_C_LEN * 8; bit++) { variable
426 printf("Corrupting C bit %d...\n", bit);
427 ds_data.c[bit / 8] ^= 1 << (bit % 8);
440 ds_data.c[bit / 8] ^= 1 << (bit % 8);
/hal_espressif-3.7.0/tools/esptool_py/docs/en/advanced-topics/
Dserial-protocol.rst1 …``, 1 byte ``flash_crypt_cnt``, 7x1 byte ``key_purposes``, 32-bit word ``chip_id``, 32-bit word ``…
133 | | the ROM loader reads the value back and the 8-bit CRC is compared |
164 …BEGIN | `Begin Flash Download <#writing-data>`__ | Four 32-bit words: size to eras…
166 …DATA | `Flash Download Data <#writing-data>`__ | Four 32-bit words: data size, s…
168 …_END | `Finish Flash Download <#writing-data>`__ | One 32-bit word: ``0`` to rebo…
172 …ND | `Finish RAM Download <#writing-data>`__ | Two 32-bit words: execute flag…
174 …TA | `RAM Download Data <#writing-data>`__ | Four 32-bit words: data size, s…
178 …| ``0x09`` | WRITE_REG | `Write 32-bit memory address <#32-bit-readwrite>`__ | Four 32-bi…
180 …bit memory address <#32-bit-readwrite>`__ | Address as 32-bit word …
188 …| `Begin Flash Download <#writing-data>`__ | Four 32-bit words: size to eras…
[all …]
/hal_espressif-3.7.0/components/efuse/esp32c2/
Desp_efuse_table.csv60 … EFUSE_BLK0, 32, 1, [] Read protection for EFUSE_BLK3. KEY0 lower 128-bit key
61 … EFUSE_BLK0, 33, 1, [] Read protection for EFUSE_BLK3. KEY0 higher 128-bit key
63 DIS_PAD_JTAG, EFUSE_BLK0, 36, 1, [] Set this bit to disable p…
64 DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 37, 1, [] The bit be set to disable…
65 DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 38, 1, [] The bit be set to disable…
69 FORCE_SEND_RESUME, EFUSE_BLK0, 45, 1, [] Set this bit to force ROM…
70 DIS_DOWNLOAD_MODE, EFUSE_BLK0, 46, 1, [] Set this bit to disable d…
71 DIS_DIRECT_BOOT, EFUSE_BLK0, 47, 1, [] This bit set means disabl…
72 ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 48, 1, [] Set this bit to enable se…
74 SECURE_BOOT_EN, EFUSE_BLK0, 53, 1, [] The bit be set to enable …
[all …]
/hal_espressif-3.7.0/components/esp_rom/
DCMakeLists.txt139 # Since ROM for ESP32 was compiled for 32-bit time_t, only link these functions
140 # if the toolchain is also using 32-bit time_t.
144 # nano formatting functions in ROM are also built for 32-bit time_t.
165 # Since ROM for ESP32-S2 was compiled for 32-bit time_t, only link these functions
166 # if the toolchain is also using 32-bit time_t.
170 # nano formatting functions in ROM are also built for 32-bit time_t.
181 # Since ROM for ESP32-S3 was compiled for 32-bit time_t, only link these functions
182 # if the toolchain is also using 32-bit time_t.
186 # nano formatting functions in ROM are also built for 32-bit time_t.
197 # Since ROM for ESP32-C3 was compiled for 32-bit time_t, only link these functions
[all …]
/hal_espressif-3.7.0/components/efuse/esp32s3/
Desp_efuse_table.csv127 DIS_ICACHE, EFUSE_BLK0, 40, 1, [] Set this bit to disable I…
128 DIS_DCACHE, EFUSE_BLK0, 41, 1, [] Set this bit to disable D…
129 DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 42, 1, [] Set this bit to disable I…
130 DIS_DOWNLOAD_DCACHE, EFUSE_BLK0, 43, 1, [] Set this bit to disable D…
131 DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, [] Set this bit to disable t…
132 DIS_USB_OTG, EFUSE_BLK0, 45, 1, [DIS_USB] Set this bit to di…
133 DIS_TWAI, EFUSE_BLK0, 46, 1, [DIS_CAN] Set this bit to di…
136 DIS_PAD_JTAG, EFUSE_BLK0, 51, 1, [HARD_DIS_JTAG] Set this bit…
137 DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 52, 1, [] Set this bit to disable f…
138 USB_EXCHG_PINS, EFUSE_BLK0, 57, 1, [] Set this bit to exchange …
[all …]
/hal_espressif-3.7.0/components/efuse/esp32c3/
Desp_efuse_table.csv107 DIS_ICACHE, EFUSE_BLK0, 40, 1, [] Set this bit to disable I…
108 DIS_USB_JTAG, EFUSE_BLK0, 41, 1, [] Set this bit to disable f…
109 DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 42, 1, [] Set this bit to disable I…
111 DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, [] Set this bit to disable t…
112 DIS_TWAI, EFUSE_BLK0, 46, 1, [DIS_CAN] Set this bit to di…
113 JTAG_SEL_ENABLE, EFUSE_BLK0, 47, 1, [] Set this bit to enable se…
115 DIS_PAD_JTAG, EFUSE_BLK0, 51, 1, [] Set this bit to disable J…
116 DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 52, 1, [] Set this bit to disable f…
117 USB_EXCHG_PINS, EFUSE_BLK0, 57, 1, [] Set this bit to exchange …
118 VDD_SPI_AS_GPIO, EFUSE_BLK0, 58, 1, [] Set this bit to vdd spi p…
[all …]
/hal_espressif-3.7.0/components/efuse/esp32s2/
Desp_efuse_table.csv116 DIS_ICACHE, EFUSE_BLK0, 40, 1, [] Set this bit to disable I…
117 DIS_DCACHE, EFUSE_BLK0, 41, 1, [] Set this bit to disable D…
120 DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, [] Set this bit to disable t…
121 DIS_USB, EFUSE_BLK0, 45, 1, [] Set this bit to disable U…
122 DIS_TWAI, EFUSE_BLK0, 46, 1, [DIS_CAN] Set this bit to di…
127 USB_EXCHG_PINS, EFUSE_BLK0, 56, 1, [] Set this bit to exchange …
128 … EFUSE_BLK0, 57, 1, [EXT_PHY_ENABLE] Set this bit to enable external …
133 VDD_SPI_FORCE, EFUSE_BLK0, 70, 1, [] Set this bit to use XPD_V…
145 SECURE_BOOT_EN, EFUSE_BLK0, 116, 1, [] Set this bit to enable se…
146 SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 117, 1, [] Set this bit to enable ag…
[all …]
/hal_espressif-3.7.0/components/riscv/include/riscv/
Dcsr.h177 #define RV_SET_CSR(reg, bit) ({ unsigned long __tmp; \ argument
178 asm volatile ("csrrs %0, " _CSR_STRINGIFY(reg) ", %1" : "=r"(__tmp) : "rK"(bit)); __tmp; })
181 #define RV_CLEAR_CSR(reg, bit) ({ unsigned long __tmp; \ argument
182 asm volatile ("csrrc %0, " _CSR_STRINGIFY(reg) ", %1" : "=r"(__tmp) : "rK"(bit)); __tmp; })
/hal_espressif-3.7.0/tools/esptool_py/docs/en/espefuse/
Dburn-bit-cmd.rst1 .. _burn-bit-cmd:
6 The ``espefuse.py burn_bit`` command burns bits in efuse blocks by bit number. This is useful when …
11 - ``bit number`` - Bit number in the efuse block [0..BLK_LEN-1] (list of numbers, like 10 15 18 17 …
15 …cted. Note that this option can not disable write protection, or clear any bit which has already b…
Dburn-efuse-cmd.rst15 …ny back to 0 will have no effect. Most eFuses have a limited bit width (many are only 1-bit flags)…
32 - 'VDD_SPI_AS_GPIO' (Set this bit to vdd spi pin function as gpio) 0b0 -> 0b1
/hal_espressif-3.7.0/components/bt/host/bluedroid/stack/btm/
Dbtm_ble_privacy.c144 UINT8 bit; in btm_ble_clear_irk_index() local
148 bit = index % 8; in btm_ble_clear_irk_index()
149 btm_cb.ble_ctr_cb.irk_list_mask[byte] &= (~(1 << bit)); in btm_ble_clear_irk_index()
166 UINT8 bit; in btm_ble_find_irk_index() local
170 bit = i % 8; in btm_ble_find_irk_index()
172 if ((btm_cb.ble_ctr_cb.irk_list_mask[byte] & (1 << bit)) == 0) { in btm_ble_find_irk_index()
173 btm_cb.ble_ctr_cb.irk_list_mask[byte] |= (1 << bit); in btm_ble_find_irk_index()
/hal_espressif-3.7.0/components/newlib/test_apps/newlib/
Dsdkconfig.defaults1 # certain 64-bit related asserts need this option to be enabled in unity in order to work correctly
/hal_espressif-3.7.0/components/esp_rom/patches/
Desp_rom_tlsf.c106 const int bit = word ? 32 - __builtin_clz(word) : 0; in tlsf_fls() local
107 return bit - 1; in tlsf_fls()
/hal_espressif-3.7.0/components/esp_rom/esp32/ld/
Desp32.rom.newlib-time.ld3 Because these functions were compiled with 32-bit width for the time_t structure.
/hal_espressif-3.7.0/components/hal/
Dspi_flash_hal_common.inc113 * 32-bit address.
185 //Only 24-bit and 32-bit address are supported. The extra length are for M7-M0, which should be

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