1 /** 2 * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #pragma once 7 8 #include <stdint.h> 9 #include "modem/reg_base.h" 10 #ifdef __cplusplus 11 extern "C" { 12 #endif 13 14 #define MODEM_LPCON_TEST_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x0) 15 /* MODEM_LPCON_CLK_EN : R/W; bitpos: [0]; default: 0; */ 16 /*description: */ 17 #define MODEM_LPCON_CLK_EN (BIT(0)) 18 #define MODEM_LPCON_CLK_EN_M (MODEM_LPCON_CLK_EN_V << MODEM_LPCON_CLK_EN_S) 19 #define MODEM_LPCON_CLK_EN_V 0x00000001U 20 #define MODEM_LPCON_CLK_EN_S 0 21 /* MODEM_LPCON_CLK_DEBUG_ENA : R/W; bitpos: [1]; default: 0; */ 22 /*description: */ 23 #define MODEM_LPCON_CLK_DEBUG_ENA (BIT(1)) 24 #define MODEM_LPCON_CLK_DEBUG_ENA_M (MODEM_LPCON_CLK_DEBUG_ENA_V << MODEM_LPCON_CLK_DEBUG_ENA_S) 25 #define MODEM_LPCON_CLK_DEBUG_ENA_V 0x00000001U 26 #define MODEM_LPCON_CLK_DEBUG_ENA_S 1 27 28 #define MODEM_LPCON_LP_TIMER_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x4) 29 /* MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW : R/W; bitpos: [0]; default: 0; */ 30 /*description: */ 31 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW (BIT(0)) 32 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_M (MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_V << MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_S) 33 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_V 0x00000001U 34 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_S 0 35 /* MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST : R/W; bitpos: [1]; default: 0; */ 36 /*description: */ 37 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST (BIT(1)) 38 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_M (MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_V << MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_S) 39 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_V 0x00000001U 40 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_S 1 41 /* MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL : R/W; bitpos: [2]; default: 0; */ 42 /*description: */ 43 #define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL (BIT(2)) 44 #define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_M (MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_V << MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_S) 45 #define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_V 0x00000001U 46 #define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_S 2 47 /* MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K : R/W; bitpos: [3]; default: 0; */ 48 /*description: */ 49 #define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K (BIT(3)) 50 #define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_M (MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_V << MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_S) 51 #define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_V 0x00000001U 52 #define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_S 3 53 /* MODEM_LPCON_CLK_LP_TIMER_DIV_NUM : R/W; bitpos: [15:4]; default: 0; */ 54 /*description: */ 55 #define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM 0x00000FFFU 56 #define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_M (MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_V << MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_S) 57 #define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_V 0x00000FFFU 58 #define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_S 4 59 60 #define MODEM_LPCON_COEX_LP_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x8) 61 /* MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW : R/W; bitpos: [0]; default: 0; */ 62 /*description: */ 63 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW (BIT(0)) 64 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_M (MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_V << MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_S) 65 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_V 0x00000001U 66 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_S 0 67 /* MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST : R/W; bitpos: [1]; default: 0; */ 68 /*description: */ 69 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST (BIT(1)) 70 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_M (MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_V << MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_S) 71 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_V 0x00000001U 72 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_S 1 73 /* MODEM_LPCON_CLK_COEX_LP_SEL_XTAL : R/W; bitpos: [2]; default: 0; */ 74 /*description: */ 75 #define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL (BIT(2)) 76 #define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_M (MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_V << MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_S) 77 #define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_V 0x00000001U 78 #define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_S 2 79 /* MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K : R/W; bitpos: [3]; default: 0; */ 80 /*description: */ 81 #define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K (BIT(3)) 82 #define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_M (MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_V << MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_S) 83 #define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_V 0x00000001U 84 #define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_S 3 85 /* MODEM_LPCON_CLK_COEX_LP_DIV_NUM : R/W; bitpos: [15:4]; default: 0; */ 86 /*description: */ 87 #define MODEM_LPCON_CLK_COEX_LP_DIV_NUM 0x00000FFFU 88 #define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_M (MODEM_LPCON_CLK_COEX_LP_DIV_NUM_V << MODEM_LPCON_CLK_COEX_LP_DIV_NUM_S) 89 #define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_V 0x00000FFFU 90 #define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_S 4 91 92 #define MODEM_LPCON_WIFI_LP_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0xc) 93 /* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW : R/W; bitpos: [0]; default: 0; */ 94 /*description: */ 95 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW (BIT(0)) 96 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_M (MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_V << MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_S) 97 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_V 0x00000001U 98 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_S 0 99 /* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST : R/W; bitpos: [1]; default: 0; */ 100 /*description: */ 101 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST (BIT(1)) 102 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_M (MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_V << MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_S) 103 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_V 0x00000001U 104 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_S 1 105 /* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL : R/W; bitpos: [2]; default: 0; */ 106 /*description: */ 107 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL (BIT(2)) 108 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_M (MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_V << MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_S) 109 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_V 0x00000001U 110 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_S 2 111 /* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K : R/W; bitpos: [3]; default: 0; */ 112 /*description: */ 113 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K (BIT(3)) 114 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_M (MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_V << MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_S) 115 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_V 0x00000001U 116 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_S 3 117 /* MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM : R/W; bitpos: [15:4]; default: 0; */ 118 /*description: */ 119 #define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM 0x00000FFFU 120 #define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_M (MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_V << MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_S) 121 #define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_V 0x00000FFFU 122 #define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_S 4 123 124 #define MODEM_LPCON_I2C_MST_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x10) 125 /* MODEM_LPCON_CLK_I2C_MST_SEL_160M : R/W; bitpos: [0]; default: 0; */ 126 /*description: */ 127 #define MODEM_LPCON_CLK_I2C_MST_SEL_160M (BIT(0)) 128 #define MODEM_LPCON_CLK_I2C_MST_SEL_160M_M (MODEM_LPCON_CLK_I2C_MST_SEL_160M_V << MODEM_LPCON_CLK_I2C_MST_SEL_160M_S) 129 #define MODEM_LPCON_CLK_I2C_MST_SEL_160M_V 0x00000001U 130 #define MODEM_LPCON_CLK_I2C_MST_SEL_160M_S 0 131 132 #define MODEM_LPCON_MODEM_32K_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x14) 133 /* MODEM_LPCON_CLK_MODEM_32K_SEL : R/W; bitpos: [1:0]; default: 0; */ 134 /*description: */ 135 #define MODEM_LPCON_CLK_MODEM_32K_SEL 0x00000003U 136 #define MODEM_LPCON_CLK_MODEM_32K_SEL_M (MODEM_LPCON_CLK_MODEM_32K_SEL_V << MODEM_LPCON_CLK_MODEM_32K_SEL_S) 137 #define MODEM_LPCON_CLK_MODEM_32K_SEL_V 0x00000003U 138 #define MODEM_LPCON_CLK_MODEM_32K_SEL_S 0 139 140 #define MODEM_LPCON_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x18) 141 /* MODEM_LPCON_CLK_WIFIPWR_EN : R/W; bitpos: [0]; default: 0; */ 142 /*description: */ 143 #define MODEM_LPCON_CLK_WIFIPWR_EN (BIT(0)) 144 #define MODEM_LPCON_CLK_WIFIPWR_EN_M (MODEM_LPCON_CLK_WIFIPWR_EN_V << MODEM_LPCON_CLK_WIFIPWR_EN_S) 145 #define MODEM_LPCON_CLK_WIFIPWR_EN_V 0x00000001U 146 #define MODEM_LPCON_CLK_WIFIPWR_EN_S 0 147 /* MODEM_LPCON_CLK_COEX_EN : R/W; bitpos: [1]; default: 0; */ 148 /*description: */ 149 #define MODEM_LPCON_CLK_COEX_EN (BIT(1)) 150 #define MODEM_LPCON_CLK_COEX_EN_M (MODEM_LPCON_CLK_COEX_EN_V << MODEM_LPCON_CLK_COEX_EN_S) 151 #define MODEM_LPCON_CLK_COEX_EN_V 0x00000001U 152 #define MODEM_LPCON_CLK_COEX_EN_S 1 153 /* MODEM_LPCON_CLK_I2C_MST_EN : R/W; bitpos: [2]; default: 0; */ 154 /*description: */ 155 #define MODEM_LPCON_CLK_I2C_MST_EN (BIT(2)) 156 #define MODEM_LPCON_CLK_I2C_MST_EN_M (MODEM_LPCON_CLK_I2C_MST_EN_V << MODEM_LPCON_CLK_I2C_MST_EN_S) 157 #define MODEM_LPCON_CLK_I2C_MST_EN_V 0x00000001U 158 #define MODEM_LPCON_CLK_I2C_MST_EN_S 2 159 /* MODEM_LPCON_CLK_LP_TIMER_EN : R/W; bitpos: [3]; default: 0; */ 160 /*description: */ 161 #define MODEM_LPCON_CLK_LP_TIMER_EN (BIT(3)) 162 #define MODEM_LPCON_CLK_LP_TIMER_EN_M (MODEM_LPCON_CLK_LP_TIMER_EN_V << MODEM_LPCON_CLK_LP_TIMER_EN_S) 163 #define MODEM_LPCON_CLK_LP_TIMER_EN_V 0x00000001U 164 #define MODEM_LPCON_CLK_LP_TIMER_EN_S 3 165 166 #define MODEM_LPCON_CLK_CONF_FORCE_ON_REG (DR_REG_MODEM_LPCON_BASE + 0x1c) 167 /* MODEM_LPCON_CLK_WIFIPWR_FO : R/W; bitpos: [0]; default: 0; */ 168 /*description: */ 169 #define MODEM_LPCON_CLK_WIFIPWR_FO (BIT(0)) 170 #define MODEM_LPCON_CLK_WIFIPWR_FO_M (MODEM_LPCON_CLK_WIFIPWR_FO_V << MODEM_LPCON_CLK_WIFIPWR_FO_S) 171 #define MODEM_LPCON_CLK_WIFIPWR_FO_V 0x00000001U 172 #define MODEM_LPCON_CLK_WIFIPWR_FO_S 0 173 /* MODEM_LPCON_CLK_COEX_FO : R/W; bitpos: [1]; default: 0; */ 174 /*description: */ 175 #define MODEM_LPCON_CLK_COEX_FO (BIT(1)) 176 #define MODEM_LPCON_CLK_COEX_FO_M (MODEM_LPCON_CLK_COEX_FO_V << MODEM_LPCON_CLK_COEX_FO_S) 177 #define MODEM_LPCON_CLK_COEX_FO_V 0x00000001U 178 #define MODEM_LPCON_CLK_COEX_FO_S 1 179 /* MODEM_LPCON_CLK_I2C_MST_FO : R/W; bitpos: [2]; default: 0; */ 180 /*description: */ 181 #define MODEM_LPCON_CLK_I2C_MST_FO (BIT(2)) 182 #define MODEM_LPCON_CLK_I2C_MST_FO_M (MODEM_LPCON_CLK_I2C_MST_FO_V << MODEM_LPCON_CLK_I2C_MST_FO_S) 183 #define MODEM_LPCON_CLK_I2C_MST_FO_V 0x00000001U 184 #define MODEM_LPCON_CLK_I2C_MST_FO_S 2 185 /* MODEM_LPCON_CLK_LP_TIMER_FO : R/W; bitpos: [3]; default: 0; */ 186 /*description: */ 187 #define MODEM_LPCON_CLK_LP_TIMER_FO (BIT(3)) 188 #define MODEM_LPCON_CLK_LP_TIMER_FO_M (MODEM_LPCON_CLK_LP_TIMER_FO_V << MODEM_LPCON_CLK_LP_TIMER_FO_S) 189 #define MODEM_LPCON_CLK_LP_TIMER_FO_V 0x00000001U 190 #define MODEM_LPCON_CLK_LP_TIMER_FO_S 3 191 /* MODEM_LPCON_CLK_BCMEM_FO : R/W; bitpos: [4]; default: 0; */ 192 /*description: */ 193 #define MODEM_LPCON_CLK_BCMEM_FO (BIT(4)) 194 #define MODEM_LPCON_CLK_BCMEM_FO_M (MODEM_LPCON_CLK_BCMEM_FO_V << MODEM_LPCON_CLK_BCMEM_FO_S) 195 #define MODEM_LPCON_CLK_BCMEM_FO_V 0x00000001U 196 #define MODEM_LPCON_CLK_BCMEM_FO_S 4 197 /* MODEM_LPCON_CLK_I2C_MST_MEM_FO : R/W; bitpos: [5]; default: 0; */ 198 /*description: */ 199 #define MODEM_LPCON_CLK_I2C_MST_MEM_FO (BIT(5)) 200 #define MODEM_LPCON_CLK_I2C_MST_MEM_FO_M (MODEM_LPCON_CLK_I2C_MST_MEM_FO_V << MODEM_LPCON_CLK_I2C_MST_MEM_FO_S) 201 #define MODEM_LPCON_CLK_I2C_MST_MEM_FO_V 0x00000001U 202 #define MODEM_LPCON_CLK_I2C_MST_MEM_FO_S 5 203 /* MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO : R/W; bitpos: [6]; default: 0; */ 204 /*description: */ 205 #define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO (BIT(6)) 206 #define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_M (MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_V << MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_S) 207 #define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_V 0x00000001U 208 #define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_S 6 209 /* MODEM_LPCON_CLK_PBUS_MEM_FO : R/W; bitpos: [7]; default: 0; */ 210 /*description: */ 211 #define MODEM_LPCON_CLK_PBUS_MEM_FO (BIT(7)) 212 #define MODEM_LPCON_CLK_PBUS_MEM_FO_M (MODEM_LPCON_CLK_PBUS_MEM_FO_V << MODEM_LPCON_CLK_PBUS_MEM_FO_S) 213 #define MODEM_LPCON_CLK_PBUS_MEM_FO_V 0x00000001U 214 #define MODEM_LPCON_CLK_PBUS_MEM_FO_S 7 215 /* MODEM_LPCON_CLK_AGC_MEM_FO : R/W; bitpos: [8]; default: 0; */ 216 /*description: */ 217 #define MODEM_LPCON_CLK_AGC_MEM_FO (BIT(8)) 218 #define MODEM_LPCON_CLK_AGC_MEM_FO_M (MODEM_LPCON_CLK_AGC_MEM_FO_V << MODEM_LPCON_CLK_AGC_MEM_FO_S) 219 #define MODEM_LPCON_CLK_AGC_MEM_FO_V 0x00000001U 220 #define MODEM_LPCON_CLK_AGC_MEM_FO_S 8 221 /* MODEM_LPCON_CLK_DC_MEM_FO : R/W; bitpos: [9]; default: 0; */ 222 /*description: */ 223 #define MODEM_LPCON_CLK_DC_MEM_FO (BIT(9)) 224 #define MODEM_LPCON_CLK_DC_MEM_FO_M (MODEM_LPCON_CLK_DC_MEM_FO_V << MODEM_LPCON_CLK_DC_MEM_FO_S) 225 #define MODEM_LPCON_CLK_DC_MEM_FO_V 0x00000001U 226 #define MODEM_LPCON_CLK_DC_MEM_FO_S 9 227 228 #define MODEM_LPCON_CLK_CONF_POWER_ST_REG (DR_REG_MODEM_LPCON_BASE + 0x20) 229 /* MODEM_LPCON_CLK_WIFIPWR_ST_MAP : R/W; bitpos: [19:16]; default: 0; */ 230 /*description: */ 231 #define MODEM_LPCON_CLK_WIFIPWR_ST_MAP 0x0000000FU 232 #define MODEM_LPCON_CLK_WIFIPWR_ST_MAP_M (MODEM_LPCON_CLK_WIFIPWR_ST_MAP_V << MODEM_LPCON_CLK_WIFIPWR_ST_MAP_S) 233 #define MODEM_LPCON_CLK_WIFIPWR_ST_MAP_V 0x0000000FU 234 #define MODEM_LPCON_CLK_WIFIPWR_ST_MAP_S 16 235 /* MODEM_LPCON_CLK_COEX_ST_MAP : R/W; bitpos: [23:20]; default: 0; */ 236 /*description: */ 237 #define MODEM_LPCON_CLK_COEX_ST_MAP 0x0000000FU 238 #define MODEM_LPCON_CLK_COEX_ST_MAP_M (MODEM_LPCON_CLK_COEX_ST_MAP_V << MODEM_LPCON_CLK_COEX_ST_MAP_S) 239 #define MODEM_LPCON_CLK_COEX_ST_MAP_V 0x0000000FU 240 #define MODEM_LPCON_CLK_COEX_ST_MAP_S 20 241 /* MODEM_LPCON_CLK_I2C_MST_ST_MAP : R/W; bitpos: [27:24]; default: 0; */ 242 /*description: */ 243 #define MODEM_LPCON_CLK_I2C_MST_ST_MAP 0x0000000FU 244 #define MODEM_LPCON_CLK_I2C_MST_ST_MAP_M (MODEM_LPCON_CLK_I2C_MST_ST_MAP_V << MODEM_LPCON_CLK_I2C_MST_ST_MAP_S) 245 #define MODEM_LPCON_CLK_I2C_MST_ST_MAP_V 0x0000000FU 246 #define MODEM_LPCON_CLK_I2C_MST_ST_MAP_S 24 247 /* MODEM_LPCON_CLK_LP_APB_ST_MAP : R/W; bitpos: [31:28]; default: 0; */ 248 /*description: */ 249 #define MODEM_LPCON_CLK_LP_APB_ST_MAP 0x0000000FU 250 #define MODEM_LPCON_CLK_LP_APB_ST_MAP_M (MODEM_LPCON_CLK_LP_APB_ST_MAP_V << MODEM_LPCON_CLK_LP_APB_ST_MAP_S) 251 #define MODEM_LPCON_CLK_LP_APB_ST_MAP_V 0x0000000FU 252 #define MODEM_LPCON_CLK_LP_APB_ST_MAP_S 28 253 254 #define MODEM_LPCON_RST_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x24) 255 /* MODEM_LPCON_RST_WIFIPWR : WO; bitpos: [0]; default: 0; */ 256 /*description: */ 257 #define MODEM_LPCON_RST_WIFIPWR (BIT(0)) 258 #define MODEM_LPCON_RST_WIFIPWR_M (MODEM_LPCON_RST_WIFIPWR_V << MODEM_LPCON_RST_WIFIPWR_S) 259 #define MODEM_LPCON_RST_WIFIPWR_V 0x00000001U 260 #define MODEM_LPCON_RST_WIFIPWR_S 0 261 /* MODEM_LPCON_RST_COEX : WO; bitpos: [1]; default: 0; */ 262 /*description: */ 263 #define MODEM_LPCON_RST_COEX (BIT(1)) 264 #define MODEM_LPCON_RST_COEX_M (MODEM_LPCON_RST_COEX_V << MODEM_LPCON_RST_COEX_S) 265 #define MODEM_LPCON_RST_COEX_V 0x00000001U 266 #define MODEM_LPCON_RST_COEX_S 1 267 /* MODEM_LPCON_RST_I2C_MST : WO; bitpos: [2]; default: 0; */ 268 /*description: */ 269 #define MODEM_LPCON_RST_I2C_MST (BIT(2)) 270 #define MODEM_LPCON_RST_I2C_MST_M (MODEM_LPCON_RST_I2C_MST_V << MODEM_LPCON_RST_I2C_MST_S) 271 #define MODEM_LPCON_RST_I2C_MST_V 0x00000001U 272 #define MODEM_LPCON_RST_I2C_MST_S 2 273 /* MODEM_LPCON_RST_LP_TIMER : WO; bitpos: [3]; default: 0; */ 274 /*description: */ 275 #define MODEM_LPCON_RST_LP_TIMER (BIT(3)) 276 #define MODEM_LPCON_RST_LP_TIMER_M (MODEM_LPCON_RST_LP_TIMER_V << MODEM_LPCON_RST_LP_TIMER_S) 277 #define MODEM_LPCON_RST_LP_TIMER_V 0x00000001U 278 #define MODEM_LPCON_RST_LP_TIMER_S 3 279 280 #define MODEM_LPCON_MEM_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x28) 281 /* MODEM_LPCON_DC_MEM_FORCE_PU : R/W; bitpos: [0]; default: 1; */ 282 /*description: */ 283 #define MODEM_LPCON_DC_MEM_FORCE_PU (BIT(0)) 284 #define MODEM_LPCON_DC_MEM_FORCE_PU_M (MODEM_LPCON_DC_MEM_FORCE_PU_V << MODEM_LPCON_DC_MEM_FORCE_PU_S) 285 #define MODEM_LPCON_DC_MEM_FORCE_PU_V 0x00000001U 286 #define MODEM_LPCON_DC_MEM_FORCE_PU_S 0 287 /* MODEM_LPCON_DC_MEM_FORCE_PD : R/W; bitpos: [1]; default: 0; */ 288 /*description: */ 289 #define MODEM_LPCON_DC_MEM_FORCE_PD (BIT(1)) 290 #define MODEM_LPCON_DC_MEM_FORCE_PD_M (MODEM_LPCON_DC_MEM_FORCE_PD_V << MODEM_LPCON_DC_MEM_FORCE_PD_S) 291 #define MODEM_LPCON_DC_MEM_FORCE_PD_V 0x00000001U 292 #define MODEM_LPCON_DC_MEM_FORCE_PD_S 1 293 /* MODEM_LPCON_AGC_MEM_FORCE_PU : R/W; bitpos: [2]; default: 1; */ 294 /*description: */ 295 #define MODEM_LPCON_AGC_MEM_FORCE_PU (BIT(2)) 296 #define MODEM_LPCON_AGC_MEM_FORCE_PU_M (MODEM_LPCON_AGC_MEM_FORCE_PU_V << MODEM_LPCON_AGC_MEM_FORCE_PU_S) 297 #define MODEM_LPCON_AGC_MEM_FORCE_PU_V 0x00000001U 298 #define MODEM_LPCON_AGC_MEM_FORCE_PU_S 2 299 /* MODEM_LPCON_AGC_MEM_FORCE_PD : R/W; bitpos: [3]; default: 0; */ 300 /*description: */ 301 #define MODEM_LPCON_AGC_MEM_FORCE_PD (BIT(3)) 302 #define MODEM_LPCON_AGC_MEM_FORCE_PD_M (MODEM_LPCON_AGC_MEM_FORCE_PD_V << MODEM_LPCON_AGC_MEM_FORCE_PD_S) 303 #define MODEM_LPCON_AGC_MEM_FORCE_PD_V 0x00000001U 304 #define MODEM_LPCON_AGC_MEM_FORCE_PD_S 3 305 /* MODEM_LPCON_PBUS_MEM_FORCE_PU : R/W; bitpos: [4]; default: 1; */ 306 /*description: */ 307 #define MODEM_LPCON_PBUS_MEM_FORCE_PU (BIT(4)) 308 #define MODEM_LPCON_PBUS_MEM_FORCE_PU_M (MODEM_LPCON_PBUS_MEM_FORCE_PU_V << MODEM_LPCON_PBUS_MEM_FORCE_PU_S) 309 #define MODEM_LPCON_PBUS_MEM_FORCE_PU_V 0x00000001U 310 #define MODEM_LPCON_PBUS_MEM_FORCE_PU_S 4 311 /* MODEM_LPCON_PBUS_MEM_FORCE_PD : R/W; bitpos: [5]; default: 0; */ 312 /*description: */ 313 #define MODEM_LPCON_PBUS_MEM_FORCE_PD (BIT(5)) 314 #define MODEM_LPCON_PBUS_MEM_FORCE_PD_M (MODEM_LPCON_PBUS_MEM_FORCE_PD_V << MODEM_LPCON_PBUS_MEM_FORCE_PD_S) 315 #define MODEM_LPCON_PBUS_MEM_FORCE_PD_V 0x00000001U 316 #define MODEM_LPCON_PBUS_MEM_FORCE_PD_S 5 317 /* MODEM_LPCON_BC_MEM_FORCE_PU : R/W; bitpos: [6]; default: 0; */ 318 /*description: */ 319 #define MODEM_LPCON_BC_MEM_FORCE_PU (BIT(6)) 320 #define MODEM_LPCON_BC_MEM_FORCE_PU_M (MODEM_LPCON_BC_MEM_FORCE_PU_V << MODEM_LPCON_BC_MEM_FORCE_PU_S) 321 #define MODEM_LPCON_BC_MEM_FORCE_PU_V 0x00000001U 322 #define MODEM_LPCON_BC_MEM_FORCE_PU_S 6 323 /* MODEM_LPCON_BC_MEM_FORCE_PD : R/W; bitpos: [7]; default: 0; */ 324 /*description: */ 325 #define MODEM_LPCON_BC_MEM_FORCE_PD (BIT(7)) 326 #define MODEM_LPCON_BC_MEM_FORCE_PD_M (MODEM_LPCON_BC_MEM_FORCE_PD_V << MODEM_LPCON_BC_MEM_FORCE_PD_S) 327 #define MODEM_LPCON_BC_MEM_FORCE_PD_V 0x00000001U 328 #define MODEM_LPCON_BC_MEM_FORCE_PD_S 7 329 /* MODEM_LPCON_I2C_MST_MEM_FORCE_PU : R/W; bitpos: [8]; default: 0; */ 330 /*description: */ 331 #define MODEM_LPCON_I2C_MST_MEM_FORCE_PU (BIT(8)) 332 #define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_M (MODEM_LPCON_I2C_MST_MEM_FORCE_PU_V << MODEM_LPCON_I2C_MST_MEM_FORCE_PU_S) 333 #define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_V 0x00000001U 334 #define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_S 8 335 /* MODEM_LPCON_I2C_MST_MEM_FORCE_PD : R/W; bitpos: [9]; default: 0; */ 336 /*description: */ 337 #define MODEM_LPCON_I2C_MST_MEM_FORCE_PD (BIT(9)) 338 #define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_M (MODEM_LPCON_I2C_MST_MEM_FORCE_PD_V << MODEM_LPCON_I2C_MST_MEM_FORCE_PD_S) 339 #define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_V 0x00000001U 340 #define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_S 9 341 /* MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU : R/W; bitpos: [10]; default: 0; */ 342 /*description: */ 343 #define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU (BIT(10)) 344 #define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_M (MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_V << MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_S) 345 #define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_V 0x00000001U 346 #define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_S 10 347 /* MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD : R/W; bitpos: [11]; default: 0; */ 348 /*description: */ 349 #define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD (BIT(11)) 350 #define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_M (MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_V << MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_S) 351 #define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_V 0x00000001U 352 #define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_S 11 353 /* MODEM_LPCON_MODEM_PWR_MEM_WP : R/W; bitpos: [14:12]; default: 0; */ 354 /*description: */ 355 #define MODEM_LPCON_MODEM_PWR_MEM_WP 0x00000007U 356 #define MODEM_LPCON_MODEM_PWR_MEM_WP_M (MODEM_LPCON_MODEM_PWR_MEM_WP_V << MODEM_LPCON_MODEM_PWR_MEM_WP_S) 357 #define MODEM_LPCON_MODEM_PWR_MEM_WP_V 0x00000007U 358 #define MODEM_LPCON_MODEM_PWR_MEM_WP_S 12 359 /* MODEM_LPCON_MODEM_PWR_MEM_WA : R/W; bitpos: [17:15]; default: 4; */ 360 /*description: */ 361 #define MODEM_LPCON_MODEM_PWR_MEM_WA 0x00000007U 362 #define MODEM_LPCON_MODEM_PWR_MEM_WA_M (MODEM_LPCON_MODEM_PWR_MEM_WA_V << MODEM_LPCON_MODEM_PWR_MEM_WA_S) 363 #define MODEM_LPCON_MODEM_PWR_MEM_WA_V 0x00000007U 364 #define MODEM_LPCON_MODEM_PWR_MEM_WA_S 15 365 /* MODEM_LPCON_MODEM_PWR_MEM_RA : R/W; bitpos: [19:18]; default: 0; */ 366 /*description: */ 367 #define MODEM_LPCON_MODEM_PWR_MEM_RA 0x00000003U 368 #define MODEM_LPCON_MODEM_PWR_MEM_RA_M (MODEM_LPCON_MODEM_PWR_MEM_RA_V << MODEM_LPCON_MODEM_PWR_MEM_RA_S) 369 #define MODEM_LPCON_MODEM_PWR_MEM_RA_V 0x00000003U 370 #define MODEM_LPCON_MODEM_PWR_MEM_RA_S 18 371 372 #define MODEM_LPCON_DATE_REG (DR_REG_MODEM_LPCON_BASE + 0x2c) 373 /* MODEM_LPCON_DATE : R/W; bitpos: [27:0]; default: 35676736; */ 374 /*description: */ 375 #define MODEM_LPCON_DATE 0x0FFFFFFFU 376 #define MODEM_LPCON_DATE_M (MODEM_LPCON_DATE_V << MODEM_LPCON_DATE_S) 377 #define MODEM_LPCON_DATE_V 0x0FFFFFFFU 378 #define MODEM_LPCON_DATE_S 0 379 380 #ifdef __cplusplus 381 } 382 #endif 383
