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Searched refs:EXTMEM_PRO_ICACHE_MEM_SYNC0_REG (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-3.7.0/components/esp_system/port/arch/xtensa/
Dpanic_arch.c181 vaddr = REG_READ(EXTMEM_PRO_ICACHE_MEM_SYNC0_REG); in print_cache_err_details()
/hal_espressif-3.7.0/components/soc/esp32s2/include/soc/
Dextmem_reg.h537 #define EXTMEM_PRO_ICACHE_MEM_SYNC0_REG (DR_REG_EXTMEM_BASE + 0x05C) macro