Searched refs:DPORT_APP_CACHE_CTRL1_REG (Results 1 – 10 of 10) sorted by relevance
/hal_espressif-3.7.0/components/hal/esp32/include/hal/ |
D | cache_ll.h | 98 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, bus_mask); in cache_ll_l1_enable_bus() 123 uint32_t bus_mask= DPORT_REG_READ(DPORT_APP_CACHE_CTRL1_REG); in cache_ll_l1_get_enabled_bus() 165 DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, bus_mask); in cache_ll_l1_disable_bus()
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/hal_espressif-3.7.0/components/bootloader_support/src/esp32/ |
D | bootloader_esp32.c | 59 DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in bootloader_reset_mmu() 61 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in bootloader_reset_mmu() 68 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0); in bootloader_reset_mmu()
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/hal_espressif-3.7.0/zephyr/port/host_flash/ |
D | cache_utils.c | 72 ret |= DPORT_GET_PERI_REG_BITS2(DPORT_APP_CACHE_CTRL1_REG, cache_mask, 0); in spi_flash_disable_cache() 110 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL1_REG, cache_mask, saved_state, 0); in spi_flash_restore_cache()
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/hal_espressif-3.7.0/components/esp_hw_support/port/esp32/ |
D | cache_sram_mmu.c | 120 DPORT_REG_SET_FIELD(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CMMU_SRAM_PAGE_MODE, mask_s); in cache_sram_mmu_set()
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D | rtc_init.c | 50 DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CMMU_FORCE_ON); in rtc_init()
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/hal_espressif-3.7.0/components/esp_system/port/ |
D | cpu_start.c | 267 DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in do_multicore_settings() 268 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in do_multicore_settings()
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/hal_espressif-3.7.0/components/spi_flash/ |
D | cache_utils.c | 374 ret |= DPORT_GET_PERI_REG_BITS2(DPORT_APP_CACHE_CTRL1_REG, cache_mask, 0); in spi_flash_disable_cache() 412 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL1_REG, cache_mask, saved_state, 0); in spi_flash_restore_cache()
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/hal_espressif-3.7.0/components/esp_psram/ |
D | esp_psram.c | 110 DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DRAM1); in s_mapping()
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/hal_espressif-3.7.0/components/esp_psram/esp32/ |
D | esp_psram_impl_quad.c | 1112 …DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DRAM1|DPORT_APP_CACHE_MA… in psram_cache_init() 1114 …DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CMMU_SRAM_PAGE_MODE, 0, DPORT_APP_CMM… in psram_cache_init()
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/hal_espressif-3.7.0/components/soc/esp32/include/soc/ |
D | dport_reg.h | 495 #define DPORT_APP_CACHE_CTRL1_REG (DR_REG_DPORT_BASE + 0x05C) macro
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