Searched refs:APB (Results 1 – 7 of 7) sorted by relevance
27 : [APB]"=a"(apb), [REG]"+a"(reg), [LVL]"=a"(intLvl)\ in esp_dport_access_reg_read()45 : [APB]"=a"(apb), [REG]"+a"(reg)\ in esp_dport_access_sequence_reg_read()
118 #define ERI_ADDR(APB) (0x100000 + (APB)) in esp_int_wdt_init() argument
114 … wise RTC fast memory operates on APB clock and hence does not have much performance impact.361 …the UART clock source is the APB clock and all baud rates in the available range will be sufficien…
22 : [APB] "=a" (apb), [REG] "+a" (reg), [LVL] "=a" (intLvl) \ in esp_dport_access_reg_read()
303 #define ERI_ADDR(APB) (0x100000 + (APB)) argument
473 : [APB]"=a"(apb), [REG]"+a"(reg), [LVL]"=a"(intLvl)\ in test_dport_access_reg_read()
340 …ck frequency divider. This is an integer clock divider value from an 80MHz APB clock, based on the…341 …are bootloader at a lower frequency than the flash_freq value. The initial APB clock frequency is …342 …When the software bootloader starts it sets the APB clock to 80MHz causing the SPI clock frequency…
