Searched refs:usr_wr_cmd_bitlen (Results 1 – 3 of 3) sorted by relevance
248 …uint32_t usr_wr_cmd_bitlen: 4; /*For SPI0 When cache mode is enable it is the… member
311 …uint32_t usr_wr_cmd_bitlen: 4; /*For SPI0 When cache mode is enable it is the in … member
251 …uint32_t usr_wr_cmd_bitlen : 4; /*When SPI0 writes Ext_RAM, it is the length in bi… member