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Searched refs:soc_has_cache_lock_bug (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-3.6.0/components/esp_system/
Dint_wdt.c131 if (soc_has_cache_lock_bug()) { in esp_int_wdt_init()
172 if (soc_has_cache_lock_bug()) { in esp_int_wdt_cpu_init()
/hal_espressif-3.6.0/components/esp_hw_support/include/
Desp_chip_info.h62 bool soc_has_cache_lock_bug(void);
/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/
Dchip_info.c43 inline bool soc_has_cache_lock_bug(void) in soc_has_cache_lock_bug() function
/hal_espressif-3.6.0/components/freertos/port/xtensa/
Dport.c492 …assert(!soc_has_cache_lock_bug() && "ESP32 Rev 3 + Dual Core + PSRAM requires INT WDT enabled in p… in esp_startup_start_app()