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Searched refs:reg_src2 (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-3.6.0/components/ulp/include/esp32s3/
Dulp.h583 #define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
586 .treg = reg_src2, \
595 #define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
598 .treg = reg_src2, \
607 #define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
610 .treg = reg_src2, \
619 #define I_ORR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
622 .treg = reg_src2, \
/hal_espressif-3.6.0/components/ulp/include/esp32s2/
Dulp.h583 #define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
586 .treg = reg_src2, \
595 #define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
598 .treg = reg_src2, \
607 #define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
610 .treg = reg_src2, \
619 #define I_ORR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
622 .treg = reg_src2, \
/hal_espressif-3.6.0/components/ulp/include/esp32/
Dulp.h617 #define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
620 .treg = reg_src2, \
629 #define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
632 .treg = reg_src2, \
641 #define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
644 .treg = reg_src2, \
653 #define I_ORR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
656 .treg = reg_src2, \