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Searched refs:reg_src1 (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-3.6.0/components/ulp/include/esp32s3/
Dulp.h583 #define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
585 .sreg = reg_src1, \
595 #define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
597 .sreg = reg_src1, \
607 #define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
609 .sreg = reg_src1, \
619 #define I_ORR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
621 .sreg = reg_src1, \
/hal_espressif-3.6.0/components/ulp/include/esp32s2/
Dulp.h583 #define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
585 .sreg = reg_src1, \
595 #define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
597 .sreg = reg_src1, \
607 #define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
609 .sreg = reg_src1, \
619 #define I_ORR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
621 .sreg = reg_src1, \
/hal_espressif-3.6.0/components/ulp/include/esp32/
Dulp.h617 #define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
619 .sreg = reg_src1, \
629 #define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
631 .sreg = reg_src1, \
641 #define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
643 .sreg = reg_src1, \
653 #define I_ORR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ argument
655 .sreg = reg_src1, \