Searched refs:reg_split_addr (Results 1 – 3 of 3) sorted by relevance
329 uint32_t reg_split_addr = 0;334 reg_split_addr = addr >> 2;335 HAL_ASSERT(addr == (reg_split_addr << 2));338 …reg_split_addr = (reg_split_addr << DPORT_PMS_PRO_IRAM0_SRAM_4_SPLTADDR_S) & DPORT_PMS_PRO_IRAM0_S…364 DPORT_WRITE_PERI_REG( DPORT_PMS_PRO_IRAM0_2_REG, reg_split_addr | permission_mask );619 uint32_t reg_split_addr = addr >> 2;620 HAL_ASSERT(addr == (reg_split_addr << 2));623 …reg_split_addr = (reg_split_addr << DPORT_PMS_PRO_DRAM0_SRAM_4_SPLTADDR_S) & DPORT_PMS_PRO_DRAM0_S…641 …DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DRAM0_1_REG, reg_split_addr | permission_mask | uni_block_perm);
139 uint32_t reg_split_addr = PERI1_RTCSLOW_ADDR_TO_CONF_REG(addr); in memprot_ll_peri1_rtcslow_set_prot() local157 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DPORT_1_REG, reg_split_addr | permission_mask); in memprot_ll_peri1_rtcslow_set_prot()297 uint32_t reg_split_addr = PERI2_RTCSLOW_0_ADDR_TO_CONF_REG(addr); in memprot_ll_peri2_rtcslow_0_set_prot() local321 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_AHB_1_REG, reg_split_addr | permission_mask); in memprot_ll_peri2_rtcslow_0_set_prot()385 uint32_t reg_split_addr = PERI2_RTCSLOW_1_ADDR_TO_CONF_REG(addr); in memprot_ll_peri2_rtcslow_1_set_prot() local409 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_AHB_2_REG, reg_split_addr | permission_mask); in memprot_ll_peri2_rtcslow_1_set_prot()
339 uint32_t reg_split_addr = 0; in memprot_ll_iram0_sram_set_prot() local342 reg_split_addr = IRAM0_SRAM_ADDR_TO_CONF_REG(addr); //cfg reg - [16:0] in memprot_ll_iram0_sram_set_prot()368 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_IRAM0_2_REG, (uint32_t)(reg_split_addr | permission_mask)); in memprot_ll_iram0_sram_set_prot()440 uint32_t reg_split_addr = IRAM0_RTCFAST_ADDR_TO_CONF_REG(addr); in memprot_ll_iram0_rtcfast_set_prot() local464 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_IRAM0_3_REG, reg_split_addr | permission_mask); in memprot_ll_iram0_rtcfast_set_prot()747 uint32_t reg_split_addr = DRAM0_SRAM_ADDR_TO_CONF_REG(addr); in memprot_ll_dram0_sram_set_prot() local765 …DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DRAM0_1_REG, reg_split_addr | permission_mask | uni_block_perm); in memprot_ll_dram0_sram_set_prot()824 uint32_t reg_split_addr = DRAM0_RTCFAST_ADDR_TO_CONF_REG(addr); in memprot_ll_dram0_rtcfast_set_prot() local842 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DRAM0_2_REG, reg_split_addr | permission_mask); in memprot_ll_dram0_rtcfast_set_prot()
