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/hal_espressif-3.6.0/components/esptool_py/esptool/esptool/targets/
Desp32s2.py106 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F
110 hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 20) & 0x01
112 low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 4) & 0x07
117 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x03
121 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x0F
125 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 28) & 0x0F
130 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 4) & 0x07
186 mac0 = self.read_reg(self.MAC_EFUSE_REG)
187 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
194 if self.read_reg(self.EFUSE_RD_REPEAT_DATA3_REG)
[all …]
Desp32s3.py117 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x07
137 hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 23) & 0x01
139 low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 18) & 0x07
144 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 0) & 0x03
148 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x07
158 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x03
187 return (self.read_reg(reg) >> shift) & 0xF
202 self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)
212 mac0 = self.read_reg(self.MAC_EFUSE_REG)
213 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
[all …]
Desp8266.py65 result = self.read_reg(0x3FF0005C) << 96
66 result |= self.read_reg(0x3FF00058) << 64
67 result |= self.read_reg(0x3FF00054) << 32
68 result |= self.read_reg(0x3FF00050)
130 id0 = self.read_reg(self.ESP_OTP_MAC0)
131 id1 = self.read_reg(self.ESP_OTP_MAC1)
136 mac0 = self.read_reg(self.ESP_OTP_MAC0)
137 mac1 = self.read_reg(self.ESP_OTP_MAC1)
138 mac3 = self.read_reg(self.ESP_OTP_MAC3)
Desp32c6.py101 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x07
105 hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 23) & 0x01
107 low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 18) & 0x07
112 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x03
135 mac0 = self.read_reg(self.MAC_EFUSE_REG)
136 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
145 self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)
161 return (self.read_reg(reg) >> shift) & 0xF
Desp32c3.py99 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x07
103 hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 23) & 0x01
105 low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 18) & 0x07
110 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x03
133 mac0 = self.read_reg(self.MAC_EFUSE_REG)
134 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
143 self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)
159 return (self.read_reg(reg) >> shift) & 0xF
Desp32h2beta1.py80 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x0F
84 hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 23) & 0x01
86 low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 18) & 0x07
91 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x03
113 mac0 = self.read_reg(self.MAC_EFUSE_REG)
114 mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
133 return (self.read_reg(reg) >> shift) & 0xF
Desp32c2.py66 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 22) & 0x07
79 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 16) & 0xF
83 return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 20) & 0x3
121 self.read_reg(self.EFUSE_XTS_KEY_LENGTH_256_REG)
125 word0 = self.read_reg(self.EFUSE_RD_DIS_REG) & self.EFUSE_RD_DIS
139 key_word[i] = self.read_reg(self.EFUSE_BLOCK_KEY0_REG + i * 4)
Desp32.py157 self.read_reg(self.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG)
163 self.read_reg(self.EFUSE_SPI_BOOT_CRYPT_CNT_REG)
170 efuses = self.read_reg(self.EFUSE_RD_ABS_DONE_REG)
191 apb_ctl_date = self.read_reg(self.APB_CTL_DATE_ADDR)
281 return self.read_reg(self.EFUSE_RD_REG_BASE + (4 * n))
355 self.read_reg(self.RTCCALICFG1) >> self.TIMERS_RTC_CALI_VALUE_S
Desp32h2.py26 word3 = self.read_reg(block1_addr + (4 * num_word))
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32/
Demulate_efuse_controller.py37 def read_reg(self, addr): member in EmulateEfuseController
46 return val | super(EmulateEfuseController, self).read_reg(addr)
54 if self.read_reg(self.REGS.EFUSE_REG_CMD) == 0:
Dfields.py199 "EFUSE_REG_DEC_STATUS", self.read_reg(self.REGS.EFUSE_REG_DEC_STATUS)
231 if self.read_reg(self.REGS.EFUSE_REG_CMD) == 0:
248 self.read_reg(self.REGS.EFUSE_REG_DEC_STATUS)
406 apb_ctl_date = self.parent.read_reg(self.parent.REGS.APB_CTL_DATE_ADDR)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32c6/
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
157 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)
185 if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
262 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)
278 block.fail = self.read_reg(addr_reg_f) & (1 << fail_bit) != 0
285 self.read_reg(addr_reg_n) >> num_offs
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32h2/
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
157 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)
185 if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
263 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)
279 block.fail = self.read_reg(addr_reg_f) & (1 << fail_bit) != 0
286 self.read_reg(addr_reg_n) >> num_offs
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32c3/
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
157 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)
185 if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
262 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)
278 block.fail = self.read_reg(addr_reg_f) & (1 << fail_bit) != 0
285 self.read_reg(addr_reg_n) >> num_offs
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32h2beta1/
Dfields.py146 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
151 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)
179 if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
258 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)
277 reg_value = self.read_reg(addr_reg)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s3beta2/
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
157 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)
185 if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
264 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)
283 reg_value = self.read_reg(addr_reg)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s3/
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
157 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)
185 if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
264 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)
283 reg_value = self.read_reg(addr_reg)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s2/
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
157 "EFUSE_RD_RS_ERR1_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR1_REG)
185 if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
310 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR0_REG + offs * 4)
329 reg_value = self.read_reg(addr_reg)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32c2/
Dfields.py146 "EFUSE_RD_RS_ERR_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR_REG)
174 if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
260 self.read_reg(self.REGS.EFUSE_RD_REPEAT_ERR_REG + offs * 4)
279 reg_value = self.read_reg(addr_reg)
/hal_espressif-3.6.0/components/esptool_py/esptool/esptool/
Dloader.py660 chip_magic_value = self.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)
700 def read_reg(self, addr, timeout=DEFAULT_TIMEOUT): member in ESPLoader
733 val = self.read_reg(addr)
920 self.cache["uart_no"] = self.read_reg(self.UARTDEV_BUF_NO) & 0xFF
1289 old_spi_usr = self.read_reg(SPI_USR_REG)
1290 old_spi_usr2 = self.read_reg(SPI_USR2_REG)
1320 if (self.read_reg(SPI_CMD_REG) & SPI_CMD_USR) == 0:
1326 status = self.read_reg(SPI_W0_REG)
1408 uart_div = self.read_reg(self.UART_CLKDIV_REG) & self.UART_CLKDIV_MASK
/hal_espressif-3.6.0/components/spi_flash/
Dspi_flash_chip_boya.c81 .read_reg = spi_flash_chip_generic_read_reg,
Dspi_flash_chip_th.c72 .read_reg = spi_flash_chip_generic_read_reg,
Dspi_flash_chip_mxic.c89 .read_reg = spi_flash_chip_mxic_read_reg,
Dspi_flash_chip_issi.c105 .read_reg = spi_flash_chip_generic_read_reg,
/hal_espressif-3.6.0/components/esp_serial_slave_link/
Dessl_internal.h32 esp_err_t (*read_reg)(void *ctx, uint8_t add, uint8_t *value_o, uint32_t wait_ms); member

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