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Searched refs:phycfg (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-3.6.0/components/esp_eth/src/
Desp_eth_phy_w5500.c63 phycfg_reg_t phycfg; in w5500_update_link_duplex_speed() local
65 …ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, w5500->addr, W5500_REG_PHYCFGR, (uint32_t *) & (phycfg.va… in w5500_update_link_duplex_speed()
66 eth_link_t link = phycfg.link ? ETH_LINK_UP : ETH_LINK_DOWN; in w5500_update_link_duplex_speed()
71 if (phycfg.speed) { in w5500_update_link_duplex_speed()
76 if (phycfg.duplex) { in w5500_update_link_duplex_speed()
120 phycfg_reg_t phycfg; in w5500_reset() local
121 …ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, w5500->addr, W5500_REG_PHYCFGR, (uint32_t *) & (phycfg.va… in w5500_reset()
122 phycfg.reset = 0; // set to '0' will reset internal PHY in w5500_reset()
123 …ESP_GOTO_ON_ERROR(eth->phy_reg_write(eth, w5500->addr, W5500_REG_PHYCFGR, phycfg.val), err, TAG, "… in w5500_reset()
125 phycfg.reset = 1; // set to '1' after reset in w5500_reset()
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Desp_eth_mac_w5500.c506 uint8_t phycfg; in is_w5500_sane_for_rxtx() local
508 if (w5500_read(emac, W5500_REG_PHYCFGR, &phycfg, 1) == ESP_OK && (phycfg & 0x8001)) { in is_w5500_sane_for_rxtx()