Searched refs:fifo_conf (Results 1 – 15 of 15) sorted by relevance
156 hw->fifo_conf.tx_fifo_rst = 1; in i2c_ll_txfifo_rst()157 hw->fifo_conf.tx_fifo_rst = 0; in i2c_ll_txfifo_rst()169 hw->fifo_conf.rx_fifo_rst = 1; in i2c_ll_rxfifo_rst()170 hw->fifo_conf.rx_fifo_rst = 0; in i2c_ll_rxfifo_rst()249 hw->fifo_conf.nonfifo_en = fifo_mode_en ? 0 : 1; in i2c_ll_set_fifo_mode()362 hw->fifo_conf.tx_fifo_empty_thrhd = empty_thr; in i2c_ll_set_txfifo_empty_thr()375 hw->fifo_conf.rx_fifo_full_thrhd = full_thr; in i2c_ll_set_rxfifo_full_thr()884 hw->fifo_conf.fifo_addr_cfg_en = 0; in i2c_ll_slave_init()
165 hw->fifo_conf.tx_fifo_mod_force_en = enable; in i2s_ll_tx_force_enable_fifo_mod()176 hw->fifo_conf.rx_fifo_mod_force_en = enable; in i2s_ll_rx_force_enable_fifo_mod()593 hw->fifo_conf.tx_fifo_mod = (chan_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2); in i2s_ll_tx_set_sample_bit()606 hw->fifo_conf.rx_fifo_mod = (chan_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2); in i2s_ll_rx_set_sample_bit()640 hw->fifo_conf.dscr_en = ena; in i2s_ll_enable_dma()707 hw->fifo_conf.tx_fifo_mod = data_bit <= I2S_BITS_PER_SAMPLE_16BIT ? mono_ena : 2 + mono_ena; in i2s_ll_tx_enable_mono_mode()720 hw->fifo_conf.rx_fifo_mod = data_bit <= I2S_BITS_PER_SAMPLE_16BIT ? mono_ena : 2 + mono_ena; in i2s_ll_rx_enable_mono_mode()919 hw->fifo_conf.rx_fifo_mod = enable; in i2s_ll_enable_builtin_adc()
160 hw->fifo_conf.tx_fifo_rst = 1; in i2c_ll_txfifo_rst()161 hw->fifo_conf.tx_fifo_rst = 0; in i2c_ll_txfifo_rst()173 hw->fifo_conf.rx_fifo_rst = 1; in i2c_ll_rxfifo_rst()174 hw->fifo_conf.rx_fifo_rst = 0; in i2c_ll_rxfifo_rst()254 hw->fifo_conf.nonfifo_en = fifo_mode_en ? 0 : 1; in i2c_ll_set_fifo_mode()369 hw->fifo_conf.tx_fifo_wm_thrhd = empty_thr; in i2c_ll_set_txfifo_empty_thr()382 hw->fifo_conf.rx_fifo_wm_thrhd = full_thr; in i2c_ll_set_rxfifo_full_thr()912 hw->fifo_conf.fifo_addr_cfg_en = 0; in i2c_ll_slave_init()
164 hw->fifo_conf.tx_fifo_mod_force_en = enable; in i2s_ll_tx_force_enable_fifo_mod()175 hw->fifo_conf.rx_fifo_mod_force_en = enable; in i2s_ll_rx_force_enable_fifo_mod()603 hw->fifo_conf.tx_fifo_mod = (chan_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2); in i2s_ll_tx_set_sample_bit()616 hw->fifo_conf.rx_fifo_mod = (chan_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2); in i2s_ll_rx_set_sample_bit()628 hw->fifo_conf.dscr_en = ena; in i2s_ll_enable_dma()805 hw->fifo_conf.tx_fifo_mod = data_bit <= I2S_BITS_PER_SAMPLE_16BIT ? mono_ena : 2 + mono_ena; in i2s_ll_tx_enable_mono_mode()819 hw->fifo_conf.rx_fifo_mod = data_bit <= I2S_BITS_PER_SAMPLE_16BIT ? mono_ena : 2 + mono_ena; in i2s_ll_rx_enable_mono_mode()
186 hw->fifo_conf.tx_fifo_rst = 1; in i2c_ll_txfifo_rst()187 hw->fifo_conf.tx_fifo_rst = 0; in i2c_ll_txfifo_rst()199 hw->fifo_conf.rx_fifo_rst = 1; in i2c_ll_rxfifo_rst()200 hw->fifo_conf.rx_fifo_rst = 0; in i2c_ll_rxfifo_rst()280 hw->fifo_conf.nonfifo_en = fifo_mode_en ? 0 : 1; in i2c_ll_set_fifo_mode()380 hw->fifo_conf.tx_fifo_wm_thrhd = empty_thr; in i2c_ll_set_txfifo_empty_thr()393 hw->fifo_conf.rx_fifo_wm_thrhd = full_thr; in i2c_ll_set_rxfifo_full_thr()912 hw->fifo_conf.fifo_addr_cfg_en = 0; in i2c_ll_slave_init()
180 hw->fifo_conf.tx_fifo_rst = 1; in i2c_ll_txfifo_rst()181 hw->fifo_conf.tx_fifo_rst = 0; in i2c_ll_txfifo_rst()193 hw->fifo_conf.rx_fifo_rst = 1; in i2c_ll_rxfifo_rst()194 hw->fifo_conf.rx_fifo_rst = 0; in i2c_ll_rxfifo_rst()275 hw->fifo_conf.nonfifo_en = fifo_mode_en ? 0 : 1; in i2c_ll_set_fifo_mode()391 hw->fifo_conf.txfifo_wm_thrhd = empty_thr; in i2c_ll_set_txfifo_empty_thr()404 hw->fifo_conf.rxfifo_wm_thrhd = full_thr; in i2c_ll_set_rxfifo_full_thr()917 hw->fifo_conf.fifo_addr_cfg_en = 0; in i2c_ll_slave_init()
190 hw->fifo_conf.tx_fifo_rst = 1; in i2c_ll_txfifo_rst()191 hw->fifo_conf.tx_fifo_rst = 0; in i2c_ll_txfifo_rst()203 hw->fifo_conf.rx_fifo_rst = 1; in i2c_ll_rxfifo_rst()204 hw->fifo_conf.rx_fifo_rst = 0; in i2c_ll_rxfifo_rst()284 hw->fifo_conf.nonfifo_en = fifo_mode_en ? 0 : 1; in i2c_ll_set_fifo_mode()397 hw->fifo_conf.tx_fifo_wm_thrhd = empty_thr; in i2c_ll_set_txfifo_empty_thr()410 hw->fifo_conf.rx_fifo_wm_thrhd = full_thr; in i2c_ll_set_rxfifo_full_thr()932 hw->fifo_conf.fifo_addr_cfg_en = 0; in i2c_ll_slave_init()
196 TEST_ASSERT_BIT_LOW(1, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);198 TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);201 TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.rx_fifo_rst);
104 } fifo_conf; member
175 } fifo_conf; member
117 } fifo_conf; member
110 } fifo_conf; member
190 } fifo_conf; member
1145 volatile i2c_fifo_conf_reg_t fifo_conf; member
