1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 #pragma once
15
16 #ifdef __cplusplus
17 extern "C" {
18 #endif
19
20 #include <stdint.h>
21 #include <stdbool.h>
22 #include "hal/misc.h"
23 #include "soc/dedic_gpio_struct.h"
24
dedic_gpio_ll_enable_instruction_access_out(dedic_dev_t * dev,uint32_t channel_mask,bool enable)25 static inline void dedic_gpio_ll_enable_instruction_access_out(dedic_dev_t *dev, uint32_t channel_mask, bool enable)
26 {
27 if (enable) {
28 dev->gpio_out_cpu.val |= channel_mask;
29 } else {
30 dev->gpio_out_cpu.val &= ~channel_mask;
31 }
32 }
33
dedic_gpio_ll_write_all(dedic_dev_t * dev,uint32_t value)34 static inline void dedic_gpio_ll_write_all(dedic_dev_t *dev, uint32_t value)
35 {
36 dev->gpio_out_drt.val = value;
37 }
38
dedic_gpio_ll_write_mask(dedic_dev_t * dev,uint32_t channel_mask,uint32_t value)39 static inline void dedic_gpio_ll_write_mask(dedic_dev_t *dev, uint32_t channel_mask, uint32_t value)
40 {
41 dedic_gpio_out_msk_reg_t d = {
42 .gpio_out_msk = channel_mask,
43 .gpio_out_value = value
44 };
45 dev->gpio_out_msk.val = d.val;
46 }
47
dedic_gpio_ll_set_channel(dedic_dev_t * dev,uint32_t channel)48 static inline void dedic_gpio_ll_set_channel(dedic_dev_t *dev, uint32_t channel)
49 {
50 dev->gpio_out_idv.val = 1 << (2 * channel);
51 }
52
dedic_gpio_ll_clear_channel(dedic_dev_t * dev,uint32_t channel)53 static inline void dedic_gpio_ll_clear_channel(dedic_dev_t *dev, uint32_t channel)
54 {
55 dev->gpio_out_idv.val = 2 << (2 * channel);
56 }
57
dedic_gpio_ll_toggle_channel(dedic_dev_t * dev,uint32_t channel)58 static inline void dedic_gpio_ll_toggle_channel(dedic_dev_t *dev, uint32_t channel)
59 {
60 dev->gpio_out_idv.val = 3 << (2 * channel);
61 }
62
dedic_gpio_ll_read_out_all(dedic_dev_t * dev)63 static inline uint32_t dedic_gpio_ll_read_out_all(dedic_dev_t *dev)
64 {
65 return HAL_FORCE_READ_U32_REG_FIELD(dev->gpio_out_scan, gpio_out_status);
66 }
67
dedic_gpio_ll_read_in_all(dedic_dev_t * dev)68 static inline uint32_t dedic_gpio_ll_read_in_all(dedic_dev_t *dev)
69 {
70 return HAL_FORCE_READ_U32_REG_FIELD(dev->gpio_in_scan, gpio_in_status);
71 }
72
dedic_gpio_ll_set_input_delay(dedic_dev_t * dev,uint32_t channel,uint32_t delay_cpu_clks)73 static inline void dedic_gpio_ll_set_input_delay(dedic_dev_t *dev, uint32_t channel, uint32_t delay_cpu_clks)
74 {
75 dev->gpio_in_dly.val &= ~(3 << (2 * channel));
76 dev->gpio_in_dly.val |= (delay_cpu_clks & 0x03) << (2 * channel);
77 }
78
dedic_gpio_ll_get_input_delay(dedic_dev_t * dev,uint32_t channel)79 static inline uint32_t dedic_gpio_ll_get_input_delay(dedic_dev_t *dev, uint32_t channel)
80 {
81 return (dev->gpio_in_dly.val & (3 << (2 * channel)) >> (2 * channel));
82 }
83
dedic_gpio_ll_set_interrupt_type(dedic_dev_t * dev,uint32_t channel,uint32_t type)84 static inline void dedic_gpio_ll_set_interrupt_type(dedic_dev_t *dev, uint32_t channel, uint32_t type)
85 {
86 dev->gpio_intr_rcgn.val &= ~(7 << (3 * channel));
87 dev->gpio_intr_rcgn.val |= (type & 0x07) << (3 * channel);
88 }
89
dedic_gpio_ll_enable_interrupt(dedic_dev_t * dev,uint32_t channel_mask,bool enable)90 static inline void dedic_gpio_ll_enable_interrupt(dedic_dev_t *dev, uint32_t channel_mask, bool enable)
91 {
92 if (enable) {
93 dev->gpio_intr_rls.val |= channel_mask;
94 } else {
95 dev->gpio_intr_rls.val &= ~channel_mask;
96 }
97 }
98
dedic_gpio_ll_get_interrupt_status(dedic_dev_t * dev)99 static inline uint32_t __attribute__((always_inline)) dedic_gpio_ll_get_interrupt_status(dedic_dev_t *dev)
100 {
101 return dev->gpio_intr_st.val;
102 }
103
dedic_gpio_ll_clear_interrupt_status(dedic_dev_t * dev,uint32_t channel_mask)104 static inline void __attribute__((always_inline)) dedic_gpio_ll_clear_interrupt_status(dedic_dev_t *dev, uint32_t channel_mask)
105 {
106 dev->gpio_intr_clr.val = channel_mask;
107 }
108
109 #ifdef __cplusplus
110 }
111 #endif
112
