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Searched refs:clk (Results 1 – 25 of 49) sorted by relevance

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/hal_espressif-3.6.0/components/esp_hw_support/include/
Desp_clk.h1 #warning esp_clk.h has been replaced by esp32/clk.h, please include esp32/clk.h instead
/hal_espressif-3.6.0/components/hal/esp32c3/include/hal/
Dspi_flash_ll.h67 …pi_flash_ll_set_clock(dev, clk) gpspi_flash_ll_set_clock((spi_dev_t*)dev, (gps… argument
94 …flash_ll_set_clock(dev, clk) spimem_flash_ll_set_clock((spi_mem_dev_t*)dev, (s… argument
/hal_espressif-3.6.0/components/hal/esp32h2/include/hal/
Dspi_flash_ll.h67 …pi_flash_ll_set_clock(dev, clk) gpspi_flash_ll_set_clock((spi_dev_t*)dev, (gps… argument
94 …flash_ll_set_clock(dev, clk) spimem_flash_ll_set_clock((spi_mem_dev_t*)dev, (s… argument
/hal_espressif-3.6.0/components/hal/esp32s2/include/hal/
Dspi_flash_ll.h67 …pi_flash_ll_set_clock(dev, clk) gpspi_flash_ll_set_clock((spi_dev_t*)dev, (gps… argument
96 …flash_ll_set_clock(dev, clk) spimem_flash_ll_set_clock((spi_mem_dev_t*)dev, (s… argument
/hal_espressif-3.6.0/components/hal/esp32s3/include/hal/
Dspi_flash_ll.h66 …pi_flash_ll_set_clock(dev, clk) gpspi_flash_ll_set_clock((spi_dev_t*)dev, (gps… argument
94 …flash_ll_set_clock(dev, clk) spimem_flash_ll_set_clock((spi_mem_dev_t*)dev, (s… argument
/hal_espressif-3.6.0/components/soc/esp32/
Dsdmmc_periph.c34 .clk = SDMMC_SLOT0_IOMUX_PIN_NUM_CLK,
46 .clk = SDMMC_SLOT1_IOMUX_PIN_NUM_CLK,
/hal_espressif-3.6.0/components/soc/esp32s3/
Dsdmmc_periph.c34 .clk = SDHOST_CCLK_OUT_1_IDX,
46 .clk = SDHOST_CCLK_OUT_2_IDX,
/hal_espressif-3.6.0/components/driver/include/driver/
Dsdmmc_host.h55 gpio_num_t clk; ///< GPIO number of CLK signal. member
93 .clk = GPIO_NUM_14, \
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32h2/
DCMakeLists.txt1 set(srcs "clk.c"
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32c3/
DCMakeLists.txt1 set(srcs "clk.c"
/hal_espressif-3.6.0/components/soc/include/soc/
Dsdmmc_periph.h47 uint8_t clk; member
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32/
DCMakeLists.txt2 "clk.c"
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32s2/
DCMakeLists.txt2 "clk.c"
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32s3/
DCMakeLists.txt2 "clk.c"
/hal_espressif-3.6.0/components/driver/
Dsdmmc_host.c395 s_sdmmc_slot_gpio_num[slot].clk = slot_config->clk; in sdmmc_host_init_slot()
418 configure_pin(clk, slot, GPIO_MODE_OUTPUT); in sdmmc_host_init_slot()
Di2c.c637 for (i2c_sclk_t clk = I2C_SCLK_DEFAULT + 1; clk < I2C_SCLK_MAX; clk++) { in i2c_get_clk_src() local
639 if (clk == I2C_SCLK_RTC) { // RTC clock for s3 is unaccessable now. in i2c_get_clk_src()
643 if ( ((clk_flags & i2c_clk_alloc[clk].character) == clk_flags) && in i2c_get_clk_src()
644 (clk_speed <= i2c_clk_alloc[clk].clk_freq) ) { in i2c_get_clk_src()
645 return clk; in i2c_get_clk_src()
/hal_espressif-3.6.0/examples/storage/sd_card/sdmmc/main/
Dsd_card_example_main.c61 slot_config.clk = GPIO_NUM_14; in app_main()
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dtimer_group_struct.h198 } clk; member
/hal_espressif-3.6.0/docs/zh_CN/hw-reference/esp32/
Dget-started-ethernet-kit-v1.1.rst193 .. figure:: ../../../_static/esp32-ethernet-kit-rmii-clk-from-phy.png
209 .. figure:: ../../../_static/esp32-ethernet-kit-rmii-clk-to-phy.png
Dget-started-ethernet-kit.rst202 .. figure:: ../../../_static/esp32-ethernet-kit-rmii-clk-from-phy.png
218 .. figure:: ../../../_static/esp32-ethernet-kit-rmii-clk-to-phy.png
/hal_espressif-3.6.0/components/esptool_py/esptool/esptool/
D__init__.py966 clk, q, d, hd, cs = values
967 value = (hd << 24) | (cs << 18) | (d << 12) | (q << 6) | clk
/hal_espressif-3.6.0/components/hal/
Dadc_hal.c238 i2s_ll_mclk_div_t clk = { in adc_hal_digi_sample_freq_config()
243 i2s_ll_rx_set_clk(hal->dev, &clk); in adc_hal_digi_sample_freq_config()
/hal_espressif-3.6.0/tools/test_idf_monitor/tests/
Din1.txt55 D (260) clk: RTC_SLOW_CLK calibration value: 3181466
Din1f1.txt54 D (260) clk: RTC_SLOW_CLK calibration value: 3181466
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Defuse_struct.h363 } clk; member

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