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/hal_espressif-3.6.0/components/esp_lcd/src/
Desp_lcd_common.c18 void *buses[SOC_LCD_I80_BUSES]; // array of i80 bus instances member
24 .buses = {} // initially the bus slots and panel slots are empty
35 if (!s_lcd_platform.buses[i]) { in lcd_com_register_device()
36 s_lcd_platform.buses[i] = device_obj; in lcd_com_register_device()
64 if (s_lcd_platform.buses[member_id]) { in lcd_com_remove_device()
65 s_lcd_platform.buses[member_id] = NULL; in lcd_com_remove_device()
Desp_lcd_panel_io_i80.c133 periph_module_enable(lcd_periph_signals.buses[bus_id].module); in esp_lcd_new_i80_bus()
146 ret = esp_intr_alloc_intrstatus(lcd_periph_signals.buses[bus_id].irq_id, isr_flags, in esp_lcd_new_i80_bus()
186 periph_module_disable(lcd_periph_signals.buses[bus->bus_id].module); in esp_lcd_new_i80_bus()
207 periph_module_disable(lcd_periph_signals.buses[bus_id].module); in esp_lcd_del_i80_bus()
513 …esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_signals.buses[bus_id].da… in lcd_i80_bus_configure_gpio()
517 …esp_rom_gpio_connect_out_signal(bus_config->dc_gpio_num, lcd_periph_signals.buses[bus_id].dc_sig, … in lcd_i80_bus_configure_gpio()
520 …esp_rom_gpio_connect_out_signal(bus_config->wr_gpio_num, lcd_periph_signals.buses[bus_id].wr_sig, … in lcd_i80_bus_configure_gpio()
565 …esp_rom_gpio_connect_out_signal(next_device->cs_gpio_num, lcd_periph_signals.buses[bus->bus_id].cs… in lcd_i80_switch_devices()
Desp_lcd_panel_io_i2s.c161 ret = esp_intr_alloc_intrstatus(lcd_periph_signals.buses[bus->bus_id].irq_id, isr_flags, in esp_lcd_new_i80_bus()
629 …esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_signals.buses[bus_id].da… in i2s_lcd_configure_gpio()
631 …esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_signals.buses[bus_id].da… in i2s_lcd_configure_gpio()
637 …esp_rom_gpio_connect_out_signal(bus_config->wr_gpio_num, lcd_periph_signals.buses[bus_id].wr_sig, … in i2s_lcd_configure_gpio()
672 …esp_rom_gpio_connect_out_signal(bus->wr_gpio_num, lcd_periph_signals.buses[bus->bus_id].wr_sig, !n… in lcd_i80_switch_devices()
/hal_espressif-3.6.0/components/soc/include/soc/
Dlcd_periph.h25 } buses[SOC_LCD_I80_BUSES]; member
46 } buses[SOC_LCD_I80_BUSES]; member
/hal_espressif-3.6.0/components/soc/esp32s2/
Dlcd_periph.c11 .buses = {
/hal_espressif-3.6.0/components/soc/esp32/
Dlcd_periph.c12 .buses = {
/hal_espressif-3.6.0/components/soc/esp32s3/
Dlcd_periph.c11 .buses = {
/hal_espressif-3.6.0/docs/en/api-reference/peripherals/
Dspi_features.rst35 - For other buses, the driver may register its ISR as the BG. The bus lock will block a device
Dspi_slave.rst19 SPI2 and SPI3 have independent signal buses with the same respective names.
117 The IO_MUX pins for SPI buses are given below.
Dspi_master.rst33 …ontrollers. They are open to users. SPI2 and SPI3 have independent signal buses with the same resp…
402 The IO_MUX pins for SPI buses are given below.
/hal_espressif-3.6.0/docs/en/api-reference/protocols/
Desp_serial_slave_link.rst8 common buses, and have their own communication protocols over those buses. The `esp_serial_slave_li…
/hal_espressif-3.6.0/components/esp_system/ld/esp32h2/
Dsections.ld.in28 * rtc_data_seg are reflect the same address space on different buses.
149 * dram0_0_seg reflect the same address space on different buses.
/hal_espressif-3.6.0/components/esp_system/ld/esp32s3/
Dsections.ld.in32 * rtc_data_seg are reflect the same address space on different buses.
184 * dram0_0_seg reflect the same address space on different buses.
/hal_espressif-3.6.0/docs/en/api-reference/storage/
Dspi_flash_concurrency.rst23 There are no such constraints and impacts for flash chips on other SPI buses than SPI0/1.
Dspi_flash.rst10 …can access to external flash chips connected to not only SPI0/1 but also other SPI buses like SPI2.
25 …ith other flash chips, that is on SPI1 with different CS, or on other SPI buses). Reading through …
205 2. On the other buses, the flash driver needs to disable the ISR registered by SPI Master driver, t…
/hal_espressif-3.6.0/components/esp_system/ld/esp32/
Dsections.ld.in26 rtc_data_seg are reflect the same address space on different buses.
/hal_espressif-3.6.0/components/esp_system/ld/esp32s2/
Dsections.ld.in35 rtc_data_seg are reflect the same address space on different buses.
/hal_espressif-3.6.0/components/esp_system/ld/esp32c3/
Dsections.ld.in141 * dram0_0_seg reflect the same address space on different buses.
/hal_espressif-3.6.0/docs/en/api-guides/
Dmemory-types.rst8 …dividual byte operations. For more information about the different memory buses consult the {IDF_T…
/hal_espressif-3.6.0/components/esp_system/
DKconfig128 on all access through the IRAM0 and DRAM0 buses.