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Searched refs:SYSTEM_RSA_PD_CTRL_REG (Results 1 – 6 of 6) sorted by relevance

/hal_espressif-3.6.0/components/mbedtls/port/esp32s3/
Dbignum.c42 REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); in esp_mpi_enable_hardware_hw_op()
53 REG_SET_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); in esp_mpi_disable_hardware_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32c3/
Dbignum.c46 REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); in esp_mpi_enable_hardware_hw_op()
55 REG_SET_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); in esp_mpi_disable_hardware_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32h2/
Dbignum.c46 REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); in esp_mpi_enable_hardware_hw_op()
55 REG_SET_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); in esp_mpi_disable_hardware_hw_op()
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dsystem_reg.h105 #define SYSTEM_RSA_PD_CTRL_REG (DR_REG_SYSTEM_BASE + 0x020) macro
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Dsystem_reg.h680 #define SYSTEM_RSA_PD_CTRL_REG (DR_REG_SYSTEM_BASE + 0x038) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dsystem_reg.h721 #define SYSTEM_RSA_PD_CTRL_REG (DR_REG_SYSTEM_BASE + 0x40) macro