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Searched refs:SUB_OPCODE_ALU_REG (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-3.6.0/components/ulp/include/esp32s3/
Dulp.h69 #define SUB_OPCODE_ALU_REG 0 /*!< Arithmetic instruction, both source values are in register */ macro
589 .sub_opcode = SUB_OPCODE_ALU_REG, \
601 .sub_opcode = SUB_OPCODE_ALU_REG, \
613 .sub_opcode = SUB_OPCODE_ALU_REG, \
625 .sub_opcode = SUB_OPCODE_ALU_REG, \
637 .sub_opcode = SUB_OPCODE_ALU_REG, \
649 .sub_opcode = SUB_OPCODE_ALU_REG, \
662 .sub_opcode = SUB_OPCODE_ALU_REG, \
/hal_espressif-3.6.0/components/ulp/include/esp32s2/
Dulp.h69 #define SUB_OPCODE_ALU_REG 0 /*!< Arithmetic instruction, both source values are in register */ macro
589 .sub_opcode = SUB_OPCODE_ALU_REG, \
601 .sub_opcode = SUB_OPCODE_ALU_REG, \
613 .sub_opcode = SUB_OPCODE_ALU_REG, \
625 .sub_opcode = SUB_OPCODE_ALU_REG, \
637 .sub_opcode = SUB_OPCODE_ALU_REG, \
649 .sub_opcode = SUB_OPCODE_ALU_REG, \
662 .sub_opcode = SUB_OPCODE_ALU_REG, \
/hal_espressif-3.6.0/components/ulp/include/esp32/
Dulp.h71 #define SUB_OPCODE_ALU_REG 0 /*!< Arithmetic instruction, both source values are in register */ macro
623 .sub_opcode = SUB_OPCODE_ALU_REG, \
635 .sub_opcode = SUB_OPCODE_ALU_REG, \
647 .sub_opcode = SUB_OPCODE_ALU_REG, \
659 .sub_opcode = SUB_OPCODE_ALU_REG, \
671 .sub_opcode = SUB_OPCODE_ALU_REG, \
683 .sub_opcode = SUB_OPCODE_ALU_REG, \
696 .sub_opcode = SUB_OPCODE_ALU_REG, \