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Searched refs:STATE_M_TX_XFWR (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-3.6.0/components/freemodbus/modbus/rtu/
Dmbrtu_m.c64 STATE_M_TX_XFWR, /*!< Transmitter is in transfer finish and wait receive state. */ enumerator
235 assert(( eSndState == STATE_M_TX_IDLE ) || ( eSndState == STATE_M_TX_XFWR )); in xMBMasterRTUReceiveFSM()
310 case STATE_M_TX_XFWR: in xMBMasterRTUTransmitFSM()
329 eSndState = STATE_M_TX_XFWR; in xMBMasterRTUTransmitFSM()
383 case STATE_M_TX_XFWR: in xMBMasterRTUTimerExpired()
/hal_espressif-3.6.0/components/freemodbus/modbus/ascii/
Dmbascii_m.c68 STATE_M_TX_XFWR, /*!< Transmitter is in transfer finish and wait receive state. */ enumerator
227 assert(( eSndState == STATE_M_TX_IDLE ) || ( eSndState == STATE_M_TX_XFWR )); in xMBMasterASCIIReceiveFSM()
366 case STATE_M_TX_XFWR: in xMBMasterASCIITransmitFSM()
427 eSndState = STATE_M_TX_XFWR; in xMBMasterASCIITransmitFSM()
494 case STATE_M_TX_XFWR: in xMBMasterASCIITimerT1SExpired()