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Searched refs:SPI_CTRL_REG (Results 1 – 13 of 13) sorted by relevance

/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/
Dspiram_psram.c244 SET_PERI_REG_MASK(SPI_CTRL_REG(spi_num), SPI_FREAD_QIO); in psram_set_qio_read_mode()
245 CLEAR_PERI_REG_MASK(SPI_CTRL_REG(spi_num), SPI_FREAD_QUAD); in psram_set_qio_read_mode()
246 CLEAR_PERI_REG_MASK(SPI_CTRL_REG(spi_num), SPI_FREAD_DUAL); in psram_set_qio_read_mode()
247 CLEAR_PERI_REG_MASK(SPI_CTRL_REG(spi_num), SPI_FREAD_DIO); in psram_set_qio_read_mode()
252 CLEAR_PERI_REG_MASK(SPI_CTRL_REG(spi_num), SPI_FREAD_QIO); in psram_set_basic_read_mode()
253 CLEAR_PERI_REG_MASK(SPI_CTRL_REG(spi_num), SPI_FREAD_QUAD); in psram_set_basic_read_mode()
254 CLEAR_PERI_REG_MASK(SPI_CTRL_REG(spi_num), SPI_FREAD_DUAL); in psram_set_basic_read_mode()
255 CLEAR_PERI_REG_MASK(SPI_CTRL_REG(spi_num), SPI_FREAD_DIO); in psram_set_basic_read_mode()
268 …uint32_t rd_mode_backup = READ_PERI_REG(SPI_CTRL_REG(spi_num)) & (SPI_FREAD_DIO_M | SPI_FREAD_DUAL… in psram_cmd_recv_start()
288 …CLEAR_PERI_REG_MASK(SPI_CTRL_REG(spi_num), (SPI_FREAD_DIO_M|SPI_FREAD_DUAL_M|SPI_FREAD_QUAD_M|SPI_… in psram_cmd_recv_start()
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/hal_espressif-3.6.0/components/spi_flash/esp32/
Dspi_flash_rom_patch.c87 CLEAR_PERI_REG_MASK(SPI_CTRL_REG(SPI_IDX), SPI_WRSR_2B); in esp_rom_spiflash_unlock()
97 SET_PERI_REG_MASK(SPI_CTRL_REG(SPI_IDX), SPI_WRSR_2B); in esp_rom_spiflash_unlock()
410 …CLEAR_PERI_REG_MASK(SPI_CTRL_REG(0), SPI_FREAD_QIO | SPI_FREAD_QUAD | SPI_FREAD_DIO | SPI_FREAD_DU… in esp_rom_spiflash_config_readmode()
423 SET_PERI_REG_MASK(SPI_CTRL_REG(0), modebit); in esp_rom_spiflash_config_readmode()
/hal_espressif-3.6.0/zephyr/esp_shared/src/boot/
Dbootloader_init_common.c107 #define SPI_MEM_CTRL_REG(x) SPI_CTRL_REG(x) in bootloader_print_flash_info()
/hal_espressif-3.6.0/components/bootloader_support/src/
Dbootloader_flash_config_esp32.c125 uint32_t modebit = READ_PERI_REG(SPI_CTRL_REG(0)); in bootloader_flash_dummy_config()
/hal_espressif-3.6.0/components/esp_rom/include/esp32/rom/
Dspi_flash.h74 #define PERIPHS_SPI_FLASH_CTRL SPI_CTRL_REG(1)
/hal_espressif-3.6.0/components/esptool_py/esptool/flasher_stub/include/
Dsoc_support.h206 #define SPI_CTRL_REG (SPI_BASE_REG + 0x08) macro
/hal_espressif-3.6.0/components/bootloader_support/src/esp32/
Dbootloader_esp32.c202 uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0)); in print_flash_info()
/hal_espressif-3.6.0/components/esptool_py/esptool/flasher_stub/
Dstub_write_flash.c138 REG_SET_MASK(SPI_CTRL_REG, SPI_WRSR_2B); in SPIUnlock()
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Dspi_reg.h54 #define SPI_CTRL_REG(i) (REG_SPI_BASE(i) + 0x8) macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dspi_reg.h54 #define SPI_CTRL_REG(i) (REG_SPI_BASE(i) + 0x008) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dspi_reg.h54 #define SPI_CTRL_REG(i) (REG_SPI_BASE(i) + 0x8) macro
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dspi_reg.h139 #define SPI_CTRL_REG(i) (REG_SPI_BASE(i) + 0x8) macro
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dspi_reg.h47 #define SPI_CTRL_REG(i) (REG_SPI_BASE(i) + 0x008) macro