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Searched refs:SPI_CMD_REG (Results 1 – 11 of 11) sorted by relevance

/hal_espressif-3.6.0/components/esptool_py/esptool/flasher_stub/
Dstub_write_flash.c82 WRITE_REG(SPI_CMD_REG, SPI_FLASH_RDSR); in spiflash_is_ready()
83 while(READ_REG(SPI_CMD_REG) != 0) in spiflash_is_ready()
93 WRITE_REG(SPI_CMD_REG, SPI_FLASH_WREN); in spi_write_enable()
94 while(READ_REG(SPI_CMD_REG) != 0) in spi_write_enable()
310 WRITE_REG(SPI_CMD_REG, command); in start_next_erase()
311 while(READ_REG(SPI_CMD_REG) != 0) { } in start_next_erase()
317 WRITE_REG(SPI_CMD_REG, command); in start_next_erase()
318 while(READ_REG(SPI_CMD_REG) != 0) { } in start_next_erase()
/hal_espressif-3.6.0/components/spi_flash/esp32/
Dspi_flash_rom_patch.c101 REG_WRITE(SPI_CMD_REG(SPI_IDX), SPI_FLASH_WREN); in esp_rom_spiflash_unlock()
102 while (REG_READ(SPI_CMD_REG(SPI_IDX)) != 0) { in esp_rom_spiflash_unlock()
108 REG_WRITE(SPI_CMD_REG(SPI_IDX), SPI_FLASH_WRDI); in esp_rom_spiflash_unlock()
109 while (REG_READ(SPI_CMD_REG(SPI_IDX)) != 0) { in esp_rom_spiflash_unlock()
688 REG_WRITE(SPI_CMD_REG(SPI_IDX), SPI_FLASH_WRDI); in esp_rom_spiflash_write_disable()
/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/
Dspiram_psram.c282 SET_PERI_REG_MASK(SPI_CMD_REG(spi_num), SPI_USR); in psram_cmd_recv_start()
283 while ((READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR)); in psram_cmd_recv_start()
311 while (READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR); in psram_cmd_config()
379 while (READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR); in psram_cmd_end()
973 SET_PERI_REG_MASK(SPI_CMD_REG(PSRAM_SPI_NUM), SPI_FLASH_READ_M); in psram_enable()
/hal_espressif-3.6.0/components/esp_rom/include/esp32/rom/
Dspi_flash.h72 #define PERIPHS_SPI_FLASH_CMD SPI_CMD_REG(1)
/hal_espressif-3.6.0/components/esptool_py/esptool/flasher_stub/include/
Dsoc_support.h198 #define SPI_CMD_REG (SPI_BASE_REG + 0x00) macro
/hal_espressif-3.6.0/components/esptool_py/esptool/esptool/
Dloader.py1227 SPI_CMD_REG = base + 0x00
1316 self.write_reg(SPI_CMD_REG, SPI_CMD_USR)
1320 if (self.read_reg(SPI_CMD_REG) & SPI_CMD_USR) == 0:
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Dspi_reg.h23 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dspi_reg.h23 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dspi_reg.h23 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dspi_reg.h21 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dspi_reg.h24 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x000) macro