Searched refs:SPI_CACHE_SRAM_USR_WR_CMD_VALUE (Results 1 – 2 of 2) sorted by relevance
1059 SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), SPI_CACHE_SRAM_USR_WR_CMD_VALUE, PSRAM_QUAD_WRITE, in psram_cache_init()1077 …SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), SPI_CACHE_SRAM_USR_WR_CMD_VALUE, ((PSRAM_QUAD_WRITE) <<… in psram_cache_init()
1013 #define SPI_CACHE_SRAM_USR_WR_CMD_VALUE 0x0000FFFF macro