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Searched refs:SPI_CACHE_SRAM_USR_WR_CMD_BITLEN (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/
Dspiram_psram.c1057 SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), SPI_CACHE_SRAM_USR_WR_CMD_BITLEN, 7, in psram_cache_init()
1075 SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), SPI_CACHE_SRAM_USR_WR_CMD_BITLEN, 15, in psram_cache_init()
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dspi_reg.h1006 #define SPI_CACHE_SRAM_USR_WR_CMD_BITLEN 0x0000000F macro