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Searched refs:SENS_TSENS_CLK_DIV_S (Results 1 – 6 of 6) sorted by relevance

/hal_espressif-3.6.0/components/esp_hw_support/test/
Dtest_tsens.c19 SET_PERI_REG_BITS(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_CLK_DIV, 10, SENS_TSENS_CLK_DIV_S);
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dsens_reg.h426 #define SENS_TSENS_CLK_DIV_M ((SENS_TSENS_CLK_DIV_V)<<(SENS_TSENS_CLK_DIV_S))
428 #define SENS_TSENS_CLK_DIV_S 16 macro
/hal_espressif-3.6.0/examples/system/deep_sleep/main/
Ddeep_sleep_example_main.c340 SET_PERI_REG_BITS(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_CLK_DIV, 2, SENS_TSENS_CLK_DIV_S); in start_ulp_temperature_monitoring()
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dsens_reg.h522 #define SENS_TSENS_CLK_DIV_M ((SENS_TSENS_CLK_DIV_V)<<(SENS_TSENS_CLK_DIV_S))
524 #define SENS_TSENS_CLK_DIV_S 14 macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dsens_reg.h505 #define SENS_TSENS_CLK_DIV_M ((SENS_TSENS_CLK_DIV_V)<<(SENS_TSENS_CLK_DIV_S))
507 #define SENS_TSENS_CLK_DIV_S 14 macro
/hal_espressif-3.6.0/components/ulp/test/esp32/
Dtest_ulp.c343 SET_PERI_REG_BITS(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_CLK_DIV, 10, SENS_TSENS_CLK_DIV_S);