Searched refs:SENS_SAR_START_FORCE_REG (Results 1 – 4 of 4) sorted by relevance
| /hal_espressif-3.6.0/components/bootloader_support/src/ |
| D | bootloader_random_esp32.c | 39 SET_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_SAR2_EN_TEST); in bootloader_random_enable()
46 CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_FORCE_START_TOP); in bootloader_random_enable()
47 CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_START_TOP); in bootloader_random_enable()
102 CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_SAR2_EN_TEST); in bootloader_random_disable()
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| /hal_espressif-3.6.0/components/ulp/ |
| D | ulp.c | 61 REG_SET_FIELD(SENS_SAR_START_FORCE_REG, SENS_PC_INIT, entry_point); in ulp_run()
63 CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_FORCE_START_TOP_M); in ulp_run()
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| /hal_espressif-3.6.0/components/ulp/test/esp32/ |
| D | test_ulp.c | 394 SET_PERI_REG_BITS(SENS_SAR_START_FORCE_REG, SENS_SAR1_BIT_WIDTH, 3, SENS_SAR1_BIT_WIDTH_S);
395 SET_PERI_REG_BITS(SENS_SAR_START_FORCE_REG, SENS_SAR2_BIT_WIDTH, 3, SENS_SAR2_BIT_WIDTH_S);
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| /hal_espressif-3.6.0/components/soc/esp32/include/soc/ |
| D | sens_reg.h | 211 #define SENS_SAR_START_FORCE_REG (DR_REG_SENS_BASE + 0x002c) macro
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