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Searched refs:SENS_SAR_READ_CTRL_REG (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-3.6.0/components/bootloader_support/src/
Dbootloader_random_esp32.c58 SET_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE); in bootloader_random_enable()
98 CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE); in bootloader_random_disable()
/hal_espressif-3.6.0/components/ulp/test/esp32/
Dtest_ulp.c397 SET_PERI_REG_BITS(SENS_SAR_READ_CTRL_REG, SENS_SAR1_SAMPLE_BIT, 0x3, SENS_SAR1_SAMPLE_BIT_S);
407 SET_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DATA_INV);
408 SET_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR2_DATA_INV);
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dsens_reg.h19 #define SENS_SAR_READ_CTRL_REG (DR_REG_SENS_BASE + 0x0000) macro