Searched refs:SENS_SAR_MEAS_WAIT2_REG (Results 1 – 5 of 5) sorted by relevance
| /hal_espressif-3.6.0/components/ulp/test/esp32/ |
| D | test_ulp.c | 344 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S);
363 I_WR_REG(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR_S, SENS_FORCE_XPD_SAR_S + 1, 3),
365 I_WR_REG(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR_S, SENS_FORCE_XPD_SAR_S + 1, 0),
403 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S);
404 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_AMP, 2, SENS_FORCE_XPD_AMP_S);
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| /hal_espressif-3.6.0/components/bootloader_support/src/ |
| D | bootloader_random_esp32.c | 57 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S); in bootloader_random_enable()
105 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S); in bootloader_random_disable()
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| /hal_espressif-3.6.0/examples/system/deep_sleep/main/ |
| D | deep_sleep_example_main.c | 341 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S); in start_ulp_temperature_monitoring()
363 I_WR_REG(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR_S, SENS_FORCE_XPD_SAR_S + 1, 3), in start_ulp_temperature_monitoring()
367 I_WR_REG(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR_S, SENS_FORCE_XPD_SAR_S + 1, 0), in start_ulp_temperature_monitoring()
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| /hal_espressif-3.6.0/components/esp_hw_support/test/ |
| D | test_tsens.c | 18 SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S);
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| /hal_espressif-3.6.0/components/soc/esp32/include/soc/ |
| D | sens_reg.h | 86 #define SENS_SAR_MEAS_WAIT2_REG (DR_REG_SENS_BASE + 0x000c) macro
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