SENSITIVE_CLOCK_GATE_REG (reference) in projects: hal_espressif-3.6.0

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Searched refs:SENSITIVE_CLOCK_GATE_REG (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
D	sensitive_reg.h	`1274 #define SENSITIVE_CLOCK_GATE_REG (DR_REG_SENSITIVE_BASE + 0x104) macro`
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
D	sensitive_reg.h	`2282 #define SENSITIVE_CLOCK_GATE_REG (DR_REG_SENSITIVE_BASE + 0x170) macro`
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
D	sensitive_reg.h	`2498 #define SENSITIVE_CLOCK_GATE_REG (DR_REG_SENSITIVE_BASE + 0x194) macro`
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
D	sensitive_reg.h	`4695 #define SENSITIVE_CLOCK_GATE_REG (DR_REG_SENSITIVE_BASE + 0x308) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
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cmsis-3.4.0
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cmsis-3.7.0-3.6.0
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cmsis-nn-3.6.0-3.5.0
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edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
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