RTC_CNTL_PLL_BUF_WAIT_DEFAULT (reference) in projects: hal_espressif-3.6.0

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Searched refs:RTC_CNTL_PLL_BUF_WAIT_DEFAULT (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
D	rtc.h	`91 #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20 macro 822 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \`
D	rtc_cntl_reg.h	`297 #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20 macro`
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
D	rtc.h	`104 #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20 macro 845 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \`
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
D	rtc.h	`101 #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20 macro 855 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \`
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
D	rtc.h	`116 #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20 macro 838 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \`
D	rtc_cntl_reg.h	`309 #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20 macro`
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
D	rtc.h	`678 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \`
D	rtc_cntl_reg.h	`330 #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20 macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
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babblesim_base-3.4.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
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