RTC_CNTL_GPIO_PIN_CLK_GATE (reference) in projects: hal_espressif-3.6.0

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Searched refs:RTC_CNTL_GPIO_PIN_CLK_GATE (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-3.6.0/components/hal/esp32c3/include/hal/
D	gpio_ll.h	`545 REG_SET_BIT(RTC_CNTL_GPIO_WAKEUP_REG, RTC_CNTL_GPIO_PIN_CLK_GATE); in gpio_ll_deepsleep_wakeup_enable()`
/hal_espressif-3.6.0/components/hal/esp32h2/include/hal/
D	gpio_ll.h	`553 REG_SET_BIT(RTC_CNTL_GPIO_WAKEUP_REG, RTC_CNTL_GPIO_PIN_CLK_GATE); in gpio_ll_deepsleep_wakeup_enable()`
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
D	rtc_cntl_reg.h	`2444 #define RTC_CNTL_GPIO_PIN_CLK_GATE (BIT(7)) macro`
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
D	rtc_cntl_reg.h	`2818 #define RTC_CNTL_GPIO_PIN_CLK_GATE (BIT(7)) macro`

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TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
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babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
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babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
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edtt-3.7.0
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