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Searched refs:RSA_MEM_Z_BLOCK_BASE (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-3.6.0/components/mbedtls/port/esp32/
Dbignum.c140 mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, z_words); in esp_mpi_read_result_hw_op()
172 mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + hw_words * 4, Y, hw_words); in esp_mpi_mul_mpi_hw_op()
214 mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, hw_words); in esp_mont_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32s3/
Dbignum.c129 mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, z_words); in esp_mpi_read_result_hw_op()
183 mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + num_words * 4, Y, num_words); in esp_mpi_mul_mpi_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32c3/
Dbignum.c136 mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, z_words); in esp_mpi_read_result_hw_op()
190 mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + num_words * 4, Y, num_words); in esp_mpi_mul_mpi_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32h2/
Dbignum.c136 mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, z_words); in esp_mpi_read_result_hw_op()
190 mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + num_words * 4, Y, num_words); in esp_mpi_mul_mpi_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32s2/
Dbignum.c131 mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, z_words); in esp_mpi_read_result_hw_op()
185 mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + num_words * 4, Y, num_words); in esp_mpi_mul_mpi_hw_op()
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dhwcrypto_reg.h23 #define RSA_MEM_Z_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dhwcrypto_reg.h15 #define RSA_MEM_Z_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200) macro
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Dhwcrypto_reg.h23 #define RSA_MEM_Z_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200) macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dhwcrypto_reg.h23 #define RSA_MEM_Z_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200) macro
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dhwcrypto_reg.h23 #define RSA_MEM_Z_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200) macro