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Searched refs:RSA_MEM_Y_BLOCK_BASE (Results 1 – 9 of 9) sorted by relevance

/hal_espressif-3.6.0/components/mbedtls/port/esp32s3/
Dbignum.c143 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_mul_mpi_mod_hw_op()
161 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_exp_mpi_mod_hw_op()
212 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_mult_mpi_failover_mod_mult_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32c3/
Dbignum.c150 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_mul_mpi_mod_hw_op()
168 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_exp_mpi_mod_hw_op()
219 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_mult_mpi_failover_mod_mult_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32h2/
Dbignum.c150 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_mul_mpi_mod_hw_op()
168 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_exp_mpi_mod_hw_op()
219 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_mult_mpi_failover_mod_mult_hw_op()
/hal_espressif-3.6.0/components/mbedtls/port/esp32s2/
Dbignum.c145 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_mul_mpi_mod_hw_op()
163 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_exp_mpi_mod_hw_op()
214 mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words); in esp_mpi_mult_mpi_failover_mod_mult_hw_op()
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dhwcrypto_reg.h24 #define RSA_MEM_Y_BLOCK_BASE ((DR_REG_RSA_BASE)+0x400) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dhwcrypto_reg.h16 #define RSA_MEM_Y_BLOCK_BASE ((DR_REG_RSA_BASE)+0x400) macro
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Dhwcrypto_reg.h24 #define RSA_MEM_Y_BLOCK_BASE ((DR_REG_RSA_BASE)+0x400) macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dhwcrypto_reg.h24 #define RSA_MEM_Y_BLOCK_BASE ((DR_REG_RSA_BASE)+0x400) macro
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dhwcrypto_reg.h24 #define RSA_MEM_Y_BLOCK_BASE ((DR_REG_RSA_BASE)+0x400) macro