REG_UHCI_BASE (reference) in projects: hal_espressif-3.6.0

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Searched refs:REG_UHCI_BASE (Results 1 – 9 of 9) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
D	uhci_reg.h	22 #define UHCI_CONF0_REG(i) (REG_UHCI_BASE(i) + 0x0) 101 #define UHCI_INT_RAW_REG(i) (REG_UHCI_BASE(i) + 0x4) 158 #define UHCI_INT_ST_REG(i) (REG_UHCI_BASE(i) + 0x8) 214 #define UHCI_INT_ENA_REG(i) (REG_UHCI_BASE(i) + 0xC) 270 #define UHCI_INT_CLR_REG(i) (REG_UHCI_BASE(i) + 0x10) 326 #define UHCI_CONF1_REG(i) (REG_UHCI_BASE(i) + 0x14) 376 #define UHCI_STATE0_REG(i) (REG_UHCI_BASE(i) + 0x18) 390 #define UHCI_STATE1_REG(i) (REG_UHCI_BASE(i) + 0x1C) 398 #define UHCI_ESCAPE_CONF_REG(i) (REG_UHCI_BASE(i) + 0x20) 448 #define UHCI_HUNG_CONF_REG(i) (REG_UHCI_BASE(i) + 0x24) [all …]
D	soc.h	`71 #define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000) macro`
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
D	uhci_reg.h	22 #define UHCI_CONF0_REG(i) (REG_UHCI_BASE(i) + 0x0) 101 #define UHCI_INT_RAW_REG(i) (REG_UHCI_BASE(i) + 0x4) 158 #define UHCI_INT_ST_REG(i) (REG_UHCI_BASE(i) + 0x8) 214 #define UHCI_INT_ENA_REG(i) (REG_UHCI_BASE(i) + 0xC) 270 #define UHCI_INT_CLR_REG(i) (REG_UHCI_BASE(i) + 0x10) 326 #define UHCI_CONF1_REG(i) (REG_UHCI_BASE(i) + 0x14) 376 #define UHCI_STATE0_REG(i) (REG_UHCI_BASE(i) + 0x18) 390 #define UHCI_STATE1_REG(i) (REG_UHCI_BASE(i) + 0x1C) 398 #define UHCI_ESCAPE_CONF_REG(i) (REG_UHCI_BASE(i) + 0x20) 448 #define UHCI_HUNG_CONF_REG(i) (REG_UHCI_BASE(i) + 0x24) [all …]
D	soc.h	`99 #define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000) macro`
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
D	uhci_reg.h	19 #define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000) macro 20 #define UHCI_CONF0_REG(i) (REG_UHCI_BASE(i) + 0x0) 171 #define UHCI_INT_RAW_REG(i) (REG_UHCI_BASE(i) + 0x4) 289 #define UHCI_INT_ST_REG(i) (REG_UHCI_BASE(i) + 0x8) 393 #define UHCI_INT_ENA_REG(i) (REG_UHCI_BASE(i) + 0xC) 497 #define UHCI_INT_CLR_REG(i) (REG_UHCI_BASE(i) + 0x10) 601 #define UHCI_DMA_OUT_STATUS_REG(i) (REG_UHCI_BASE(i) + 0x14) 615 #define UHCI_DMA_OUT_PUSH_REG(i) (REG_UHCI_BASE(i) + 0x18) 629 #define UHCI_DMA_IN_STATUS_REG(i) (REG_UHCI_BASE(i) + 0x1C) 649 #define UHCI_DMA_IN_POP_REG(i) (REG_UHCI_BASE(i) + 0x20) [all …]
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
D	uhci_reg.h	22 #define UHCI_CONF0_REG(i) (REG_UHCI_BASE(i) + 0x0) 162 #define UHCI_INT_RAW_REG(i) (REG_UHCI_BASE(i) + 0x4) 266 #define UHCI_INT_ST_REG(i) (REG_UHCI_BASE(i) + 0x8) 370 #define UHCI_INT_ENA_REG(i) (REG_UHCI_BASE(i) + 0xC) 474 #define UHCI_INT_CLR_REG(i) (REG_UHCI_BASE(i) + 0x10) 578 #define UHCI_DMA_OUT_STATUS_REG(i) (REG_UHCI_BASE(i) + 0x14) 592 #define UHCI_DMA_OUT_PUSH_REG(i) (REG_UHCI_BASE(i) + 0x18) 606 #define UHCI_DMA_IN_STATUS_REG(i) (REG_UHCI_BASE(i) + 0x1C) 626 #define UHCI_DMA_IN_POP_REG(i) (REG_UHCI_BASE(i) + 0x20) 640 #define UHCI_DMA_OUT_LINK_REG(i) (REG_UHCI_BASE(i) + 0x24) [all …]
D	soc.h	`95 #define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE) macro`
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
D	uhci_reg.h	23 #define UHCI_CONF0_REG(i) (REG_UHCI_BASE(i) + 0x0) 103 #define UHCI_INT_RAW_REG(i) (REG_UHCI_BASE(i) + 0x4) 159 #define UHCI_INT_ST_REG(i) (REG_UHCI_BASE(i) + 0x8) 215 #define UHCI_INT_ENA_REG(i) (REG_UHCI_BASE(i) + 0xC) 271 #define UHCI_INT_CLR_REG(i) (REG_UHCI_BASE(i) + 0x10) 327 #define UHCI_APP_INT_SET_REG(i) (REG_UHCI_BASE(i) + 0x14) 341 #define UHCI_CONF1_REG(i) (REG_UHCI_BASE(i) + 0x18) 391 #define UHCI_STATE0_REG(i) (REG_UHCI_BASE(i) + 0x1C) 405 #define UHCI_STATE1_REG(i) (REG_UHCI_BASE(i) + 0x20) 413 #define UHCI_ESCAPE_CONF_REG(i) (REG_UHCI_BASE(i) + 0x24) [all …]
D	soc.h	`115 #define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
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