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Searched refs:R3 (Results 1 – 13 of 13) sorted by relevance

/hal_espressif-3.6.0/components/ulp/test/esp32/
Dtest_ulp.c52 I_MOVI(R3, 16),
53 I_LD(R0, R3, 0),
54 I_LD(R1, R3, 1),
56 I_ST(R2, R3, 2),
80 I_SUBR(R3, R1, R2), // r3 = r1 - r2
81 I_ST(R3, R0, 0), // dst[0] = r3
110 I_RSHI(R3, R1, 5), // R3 = R1 / 32
111 I_ST(R1, R3, 16),
115 I_MOVI(R3, 15),
116 I_ST(R2, R3, 0),
[all …]
/hal_espressif-3.6.0/components/wpa_supplicant/src/crypto/
Dsha1-internal.c152 #define R3(v,w,x,y,z,i) \ macro
208 R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43); in SHA1Transform()
209 R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3(e,a,b,c,d,46); R3(d,e,a,b,c,47); in SHA1Transform()
210 R3(c,d,e,a,b,48); R3(b,c,d,e,a,49); R3(a,b,c,d,e,50); R3(e,a,b,c,d,51); in SHA1Transform()
211 R3(d,e,a,b,c,52); R3(c,d,e,a,b,53); R3(b,c,d,e,a,54); R3(a,b,c,d,e,55); in SHA1Transform()
212 R3(e,a,b,c,d,56); R3(d,e,a,b,c,57); R3(c,d,e,a,b,58); R3(b,c,d,e,a,59); in SHA1Transform()
/hal_espressif-3.6.0/components/ulp/
DREADME.rst7 I_MOVI(R3, 16), // R3 <- 16
8 I_LD(R0, R3, 0), // R0 <- RTC_SLOW_MEM[R3 + 0]
9 I_LD(R1, R3, 1), // R1 <- RTC_SLOW_MEM[R3 + 1]
11 I_ST(R2, R3, 2), // R2 -> RTC_SLOW_MEM[R2 + 2]
19 …n. Arguments of these preprocessor defines can be register numbers (``R0 — R3``) and literal const…
40 I_SUBR(R3, R1, R2), // R3 <- R1 - R2
41 I_ST(R3, R0, 0), // R3 -> RTC_SLOW_MEM[R0 + 0]
/hal_espressif-3.6.0/examples/system/deep_sleep/main/
Ddeep_sleep_example_main.c365 I_TSENS(R3, 8000), in start_ulp_temperature_monitoring()
369 I_ST(R3, R2, 2), in start_ulp_temperature_monitoring()
375 I_MOVR(R0, R3), in start_ulp_temperature_monitoring()
381 I_SUBR(R1, R1, R3), in start_ulp_temperature_monitoring()
387 I_SUBR(R1, R3, R1), in start_ulp_temperature_monitoring()
/hal_espressif-3.6.0/components/mbedtls/esp_crt_bundle/
Dcmn_crt_authorities.csv18 GlobalSign,GlobalSign Root CA - R3
29 Google Trust Services LLC (GTS),GTS Root R3
Dcacrt_all.pem738 GlobalSign Root CA - R3
2525 GTS Root R3
/hal_espressif-3.6.0/docs/en/api-guides/
Dulp_instruction_set.rst6 ULP coprocessor has 4 16-bit general purpose registers, labeled R0, R1, R2, R3. It also has an 8-bi…
126 1: ADD R1, R2, R3 //R1 = R2 + R3
162 1: SUB R1, R2, R3 //R1 = R2 - R3
196 1: AND R1, R2, R3 //R1 = R2 & R3
231 1: OR R1, R2, R3 //R1 = R2 \| R3
267 1: LSH R1, R2, R3 //R1 = R2 << R3
302 1: RSH R1, R2, R3 //R1 = R2 >> R3
Dulps2_instruction_set.rst6 ULP coprocessor has 4 16-bit general purpose registers, labeled R0, R1, R2, R3. It also has an 8-bi…
137 1: ADD R1, R2, R3 //R1 = R2 + R3
173 1: SUB R1, R2, R3 //R1 = R2 - R3
207 1: AND R1, R2, R3 //R1 = R2 & R3
242 1: OR R1, R2, R3 //R1 = R2 \| R3
277 1: LSH R1, R2, R3 //R1 = R2 << R3
312 1: RSH R1, R2, R3 //R1 = R2 >> R3
/hal_espressif-3.6.0/docs/zh_CN/hw-reference/esp32/
Duser-guide-devkits-r-v1.1.rst237 R3 22 GPIO22
/hal_espressif-3.6.0/components/ulp/include/esp32s3/
Dulp.h39 #define R3 3 /*!< general purpose register 3 */ macro
/hal_espressif-3.6.0/components/ulp/include/esp32s2/
Dulp.h39 #define R3 3 /*!< general purpose register 3 */ macro
/hal_espressif-3.6.0/components/ulp/include/esp32/
Dulp.h39 #define R3 3 /*!< general purpose register 3 */ macro
/hal_espressif-3.6.0/docs/en/hw-reference/esp32/
Duser-guide-devkits-r-v1.1.rst237 R3 22 GPIO22