| /hal_espressif-3.6.0/components/ulp/test/esp32/ |
| D | test_ulp.c | 54 I_LD(R1, R3, 1),
55 I_ADDR(R2, R0, R1),
76 I_MOVI(R1, 32),
77 I_LD(R1, R1, 0), // r1 = mem[33]
80 I_SUBR(R3, R1, R2), // r3 = r1 - r2
105 I_MOVI(R1, 1024),
108 I_SUBI(R1, R1, 1),
110 I_RSHI(R3, R1, 5), // R3 = R1 / 32
111 I_ST(R1, R3, 16),
136 I_MOVI(R1, 64),
[all …]
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| /hal_espressif-3.6.0/docs/en/api-guides/ |
| D | ulps2_instruction_set.rst | 6 ULP coprocessor has 4 16-bit general purpose registers, labeled R0, R1, R2, R3. It also has an 8-bi…
27 MOVE R1, loop
28 JUMP R1
36 0010 MOVE R1, 4
37 0014 JUMP R1
42 MOVE R1, val
44 In this case, value loaded into R1 will be ``0x10``.
54 MOVE R1, array
56 ST R2, R1, 0 // write value of R2 into the first array element,
59 ST R2, R1, 4 // write value of R2 into the second array element
[all …]
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| D | ulp_instruction_set.rst | 6 ULP coprocessor has 4 16-bit general purpose registers, labeled R0, R1, R2, R3. It also has an 8-bi…
26 MOVE R1, loop
27 JUMP R1
35 0010 MOVE R1, 4
36 0014 JUMP R1
41 MOVE R1, val
43 In this case, value loaded into R1 will be ``0x10``.
53 MOVE R1, array
55 ST R2, R1, 0 // write value of R2 into the first array element,
58 ST R2, R1, 4 // write value of R2 into the second array element
[all …]
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| /hal_espressif-3.6.0/examples/system/deep_sleep/main/ |
| D | deep_sleep_example_main.c | 359 I_LD(R1, R2, 1), in start_ulp_temperature_monitoring()
360 I_ADDI(R1, R1, 1), in start_ulp_temperature_monitoring()
361 I_ST(R1, R2, 1), in start_ulp_temperature_monitoring()
380 I_ADDI(R1, R0, max_temp_diff - 1), in start_ulp_temperature_monitoring()
381 I_SUBR(R1, R1, R3), in start_ulp_temperature_monitoring()
382 I_ST(R1, R2, 3), in start_ulp_temperature_monitoring()
386 I_SUBI(R1, R0, max_temp_diff - 1), in start_ulp_temperature_monitoring()
387 I_SUBR(R1, R3, R1), in start_ulp_temperature_monitoring()
388 I_ST(R1, R2, 4), in start_ulp_temperature_monitoring()
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| /hal_espressif-3.6.0/components/ulp/ |
| D | README.rst | 9 I_LD(R1, R3, 1), // R1 <- RTC_SLOW_MEM[R3 + 1]
10 I_ADDR(R2, R0, R1), // R2 <- R0 + R1
36 I_MOVI(R1, 32), // R1 <- 32
37 I_LD(R1, R1, 0), // R1 <- RTC_SLOW_MEM[R1]
40 I_SUBR(R3, R1, R2), // R3 <- R1 - R2
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| /hal_espressif-3.6.0/components/wpa_supplicant/src/crypto/ |
| D | sha1-internal.c | 147 #define R1(v,w,x,y,z,i) \ macro
202 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); in SHA1Transform()
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| /hal_espressif-3.6.0/components/esptool_py/esptool/docs/en/esptool/ |
| D | configuration-file.rst | 76 custom_reset_sequence = D0|R1|W0.1|D1|R0|W0.5|D0
138 For example: ``D0|R1|W0.1|D1|R0|W0.5|D0`` represents the following classic reset sequence:
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| /hal_espressif-3.6.0/components/mbedtls/esp_crt_bundle/ |
| D | cmn_crt_authorities.csv | 27 Google Trust Services LLC (GTS),GTS Root R1
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| D | cacrt_all.pem | 2465 GTS Root R1
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| /hal_espressif-3.6.0/docs/zh_CN/hw-reference/esp32/ |
| D | user-guide-devkits-r-v1.1.rst | 235 R1 GND GND
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| /hal_espressif-3.6.0/components/ulp/include/esp32s3/ |
| D | ulp.h | 37 #define R1 1 /*!< general purpose register 1 */ macro
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| /hal_espressif-3.6.0/components/ulp/include/esp32s2/ |
| D | ulp.h | 37 #define R1 1 /*!< general purpose register 1 */ macro
|
| /hal_espressif-3.6.0/components/ulp/include/esp32/ |
| D | ulp.h | 37 #define R1 1 /*!< general purpose register 1 */ macro
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| /hal_espressif-3.6.0/docs/en/hw-reference/esp32/ |
| D | user-guide-devkits-r-v1.1.rst | 235 R1 GND GND
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