1 /* 2 * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #pragma once 8 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <stdbool.h> 12 #include <stddef.h> 13 #include "soc/soc_caps.h" 14 15 #ifdef __cplusplus 16 extern "C" { 17 #endif 18 19 /** 20 * @brief I2S bit width per sample. 21 * 22 */ 23 typedef enum { 24 I2S_BITS_PER_SAMPLE_8BIT = 8, /*!< data bit-width: 8 */ 25 I2S_BITS_PER_SAMPLE_16BIT = 16, /*!< data bit-width: 16 */ 26 I2S_BITS_PER_SAMPLE_24BIT = 24, /*!< data bit-width: 24 */ 27 I2S_BITS_PER_SAMPLE_32BIT = 32, /*!< data bit-width: 32 */ 28 } i2s_bits_per_sample_t; 29 30 /** 31 * @brief I2S bit width per chan. 32 * 33 */ 34 typedef enum { 35 I2S_BITS_PER_CHAN_DEFAULT = (0), /*!< channel bit-width equals to data bit-width */ 36 I2S_BITS_PER_CHAN_8BIT = (8), /*!< channel bit-width: 8 */ 37 I2S_BITS_PER_CHAN_16BIT = (16), /*!< channel bit-width: 16 */ 38 I2S_BITS_PER_CHAN_24BIT = (24), /*!< channel bit-width: 24 */ 39 I2S_BITS_PER_CHAN_32BIT = (32), /*!< channel bit-width: 32 */ 40 } i2s_bits_per_chan_t; 41 42 /** 43 * @brief I2S channel. 44 * 45 */ 46 typedef enum { 47 I2S_CHANNEL_MONO = 1, /*!< I2S channel (mono), one channel activated. In this mode, you only need to send one channel data but the fifo will copy same data for the other unactivated channels automatically, then both channels will transmit same data. */ 48 I2S_CHANNEL_STEREO = 2, /*!< I2S channel (stereo), two (or more) channels activated. In this mode, these channels will transmit different data. */ 49 #if SOC_I2S_SUPPORTS_TDM 50 // Bit map of activated chan. 51 // There are 16 channels in TDM mode. 52 // For TX module, only the activated channel send the audio data, the unactivated channel send a constant(configurable) or will be skiped if 'skip_msk' is set. 53 // For RX module, only receive the audio data in activated channels, the data in unactivated channels will be ignored. 54 // the bit map of activated channel can not exceed the maximum enabled channel number (i.e. 0x10000 << total_chan_num). 55 // e.g: active_chan_mask = (I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH3), here the active_chan_number is 2 and total_chan_num is not supposed to be smaller than 4. 56 I2S_TDM_ACTIVE_CH0 = (0x1 << 16), /*!< I2S channel 0 activated */ 57 I2S_TDM_ACTIVE_CH1 = (0x1 << 17), /*!< I2S channel 1 activated */ 58 I2S_TDM_ACTIVE_CH2 = (0x1 << 18), /*!< I2S channel 2 activated */ 59 I2S_TDM_ACTIVE_CH3 = (0x1 << 19), /*!< I2S channel 3 activated */ 60 I2S_TDM_ACTIVE_CH4 = (0x1 << 20), /*!< I2S channel 4 activated */ 61 I2S_TDM_ACTIVE_CH5 = (0x1 << 21), /*!< I2S channel 5 activated */ 62 I2S_TDM_ACTIVE_CH6 = (0x1 << 22), /*!< I2S channel 6 activated */ 63 I2S_TDM_ACTIVE_CH7 = (0x1 << 23), /*!< I2S channel 7 activated */ 64 I2S_TDM_ACTIVE_CH8 = (0x1 << 24), /*!< I2S channel 8 activated */ 65 I2S_TDM_ACTIVE_CH9 = (0x1 << 25), /*!< I2S channel 9 activated */ 66 I2S_TDM_ACTIVE_CH10 = (0x1 << 26), /*!< I2S channel 10 activated */ 67 I2S_TDM_ACTIVE_CH11 = (0x1 << 27), /*!< I2S channel 11 activated */ 68 I2S_TDM_ACTIVE_CH12 = (0x1 << 28), /*!< I2S channel 12 activated */ 69 I2S_TDM_ACTIVE_CH13 = (0x1 << 29), /*!< I2S channel 13 activated */ 70 I2S_TDM_ACTIVE_CH14 = (0x1 << 30), /*!< I2S channel 14 activated */ 71 I2S_TDM_ACTIVE_CH15 = (0x1 << 31), /*!< I2S channel 15 activated */ 72 #endif 73 } i2s_channel_t; 74 75 /** 76 * @brief I2S communication standard format 77 * 78 */ 79 typedef enum { 80 I2S_COMM_FORMAT_STAND_I2S = 0X01, /*!< I2S communication I2S Philips standard, data launch at second BCK*/ 81 I2S_COMM_FORMAT_STAND_MSB = 0X02, /*!< I2S communication MSB alignment standard, data launch at first BCK*/ 82 I2S_COMM_FORMAT_STAND_PCM_SHORT = 0x04, /*!< PCM Short standard, also known as DSP mode. The period of synchronization signal (WS) is 1 bck cycle.*/ 83 I2S_COMM_FORMAT_STAND_PCM_LONG = 0x0C, /*!< PCM Long standard. The period of synchronization signal (WS) is channel_bit*bck cycles.*/ 84 I2S_COMM_FORMAT_STAND_MAX, /*!< standard max*/ 85 86 //old definition will be removed in the future. 87 I2S_COMM_FORMAT_I2S __attribute__((deprecated)) = 0x01, /*!< I2S communication format I2S, correspond to `I2S_COMM_FORMAT_STAND_I2S`*/ 88 I2S_COMM_FORMAT_I2S_MSB __attribute__((deprecated)) = 0x01, /*!< I2S format MSB, (I2S_COMM_FORMAT_I2S |I2S_COMM_FORMAT_I2S_MSB) correspond to `I2S_COMM_FORMAT_STAND_I2S`*/ 89 I2S_COMM_FORMAT_I2S_LSB __attribute__((deprecated)) = 0x02, /*!< I2S format LSB, (I2S_COMM_FORMAT_I2S |I2S_COMM_FORMAT_I2S_LSB) correspond to `I2S_COMM_FORMAT_STAND_MSB`*/ 90 I2S_COMM_FORMAT_PCM __attribute__((deprecated)) = 0x04, /*!< I2S communication format PCM, correspond to `I2S_COMM_FORMAT_STAND_PCM_SHORT`*/ 91 I2S_COMM_FORMAT_PCM_SHORT __attribute__((deprecated)) = 0x04, /*!< PCM Short, (I2S_COMM_FORMAT_PCM | I2S_COMM_FORMAT_PCM_SHORT) correspond to `I2S_COMM_FORMAT_STAND_PCM_SHORT`*/ 92 I2S_COMM_FORMAT_PCM_LONG __attribute__((deprecated)) = 0x08, /*!< PCM Long, (I2S_COMM_FORMAT_PCM | I2S_COMM_FORMAT_PCM_LONG) correspond to `I2S_COMM_FORMAT_STAND_PCM_LONG`*/ 93 } i2s_comm_format_t; 94 95 /** 96 * @brief I2S channel format type 97 */ 98 typedef enum { 99 I2S_CHANNEL_FMT_RIGHT_LEFT, /*!< Separated left and right channel */ 100 I2S_CHANNEL_FMT_ALL_RIGHT, /*!< Load right channel data in both two channels */ 101 I2S_CHANNEL_FMT_ALL_LEFT, /*!< Load left channel data in both two channels */ 102 I2S_CHANNEL_FMT_ONLY_RIGHT, /*!< Only load data in right channel (mono mode) */ 103 I2S_CHANNEL_FMT_ONLY_LEFT, /*!< Only load data in left channel (mono mode) */ 104 #if SOC_I2S_SUPPORTS_TDM 105 // Multiple channels are available with TDM feature 106 I2S_CHANNEL_FMT_MULTIPLE, /*!< More than two channels are used */ 107 #endif 108 } i2s_channel_fmt_t; 109 110 /** 111 * @brief I2S Mode 112 */ 113 typedef enum { 114 I2S_MODE_MASTER = (0x1 << 0), /*!< Master mode*/ 115 I2S_MODE_SLAVE = (0x1 << 1), /*!< Slave mode*/ 116 I2S_MODE_TX = (0x1 << 2), /*!< TX mode*/ 117 I2S_MODE_RX = (0x1 << 3), /*!< RX mode*/ 118 #if SOC_I2S_SUPPORTS_DAC 119 //built-in DAC functions are only supported on I2S0 for ESP32 chip. 120 I2S_MODE_DAC_BUILT_IN = (0x1 << 4), /*!< Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB*/ 121 #endif // SOC_I2S_SUPPORTS_DAC 122 #if SOC_I2S_SUPPORTS_ADC 123 I2S_MODE_ADC_BUILT_IN = (0x1 << 5), /*!< Input I2S data from built-in ADC, each data can be 12-bit width at most*/ 124 #endif // SOC_I2S_SUPPORTS_ADC 125 // PDM functions are only supported on I2S0 (all chips). 126 I2S_MODE_PDM = (0x1 << 6), /*!< I2S PDM mode*/ 127 } i2s_mode_t; 128 129 /** 130 * @brief I2S source clock 131 */ 132 typedef enum { 133 I2S_CLK_D2CLK = 0, /*!< Clock from PLL_D2_CLK(160M)*/ 134 #if SOC_I2S_SUPPORTS_APLL 135 I2S_CLK_APLL, /*!< Clock from APLL*/ 136 #endif 137 } i2s_clock_src_t; 138 139 /** 140 * @brief The multiple of mclk to sample rate 141 */ 142 typedef enum { 143 I2S_MCLK_MULTIPLE_DEFAULT = 0, /*!< Default value. mclk = sample_rate * 256 */ 144 I2S_MCLK_MULTIPLE_128 = 128, /*!< mclk = sample_rate * 128 */ 145 I2S_MCLK_MULTIPLE_256 = 256, /*!< mclk = sample_rate * 256 */ 146 I2S_MCLK_MULTIPLE_384 = 384, /*!< mclk = sample_rate * 384 */ 147 } i2s_mclk_multiple_t; 148 149 #if SOC_I2S_SUPPORTS_DAC 150 /** 151 * @brief I2S DAC mode for i2s_set_dac_mode. 152 * 153 * @note Built-in DAC functions are only supported on I2S0 for current ESP32 chip. 154 */ 155 typedef enum { 156 I2S_DAC_CHANNEL_DISABLE = 0, /*!< Disable I2S built-in DAC signals*/ 157 I2S_DAC_CHANNEL_RIGHT_EN = 1, /*!< Enable I2S built-in DAC right channel, maps to DAC channel 1 on GPIO25*/ 158 I2S_DAC_CHANNEL_LEFT_EN = 2, /*!< Enable I2S built-in DAC left channel, maps to DAC channel 2 on GPIO26*/ 159 I2S_DAC_CHANNEL_BOTH_EN = 0x3, /*!< Enable both of the I2S built-in DAC channels.*/ 160 I2S_DAC_CHANNEL_MAX = 0x4, /*!< I2S built-in DAC mode max index*/ 161 } i2s_dac_mode_t; 162 #endif //SOC_I2S_SUPPORTS_DAC 163 164 #if SOC_I2S_SUPPORTS_PCM 165 /** 166 * @brief A/U-law decompress or compress configuration. 167 * 168 */ 169 typedef enum { 170 I2S_PCM_DISABLE = 0, /*!< Disable A/U law decopress or compress*/ 171 I2S_PCM_A_DECOMPRESS, /*!< A-law decompress*/ 172 I2S_PCM_A_COMPRESS, /*!< A-law compress*/ 173 I2S_PCM_U_DECOMPRESS, /*!< U-law decompress*/ 174 I2S_PCM_U_COMPRESS, /*!< U-law compress*/ 175 } i2s_pcm_compress_t; 176 #endif 177 178 #if SOC_I2S_SUPPORTS_PDM_RX 179 /** 180 * @brief I2S PDM RX downsample mode 181 */ 182 typedef enum { 183 I2S_PDM_DSR_8S = 0, /*!< downsampling number is 8 for PDM RX mode*/ 184 I2S_PDM_DSR_16S, /*!< downsampling number is 16 for PDM RX mode*/ 185 I2S_PDM_DSR_MAX, 186 } i2s_pdm_dsr_t; 187 #endif 188 189 #if SOC_I2S_SUPPORTS_PDM_TX 190 typedef enum { 191 I2S_PDM_SIG_SCALING_DIV_2 = 0, /*!< I2S TX PDM sigmadelta signal scaling: /2 */ 192 I2S_PDM_SIG_SCALING_MUL_1 = 1, /*!< I2S TX PDM sigmadelta signal scaling: x1 */ 193 I2S_PDM_SIG_SCALING_MUL_2 = 2, /*!< I2S TX PDM sigmadelta signal scaling: x2 */ 194 I2S_PDM_SIG_SCALING_MUL_4 = 3, /*!< I2S TX PDM sigmadelta signal scaling: x4 */ 195 } i2s_pdm_sig_scale_t; 196 #endif 197 198 #ifdef __cplusplus 199 } 200 #endif 201
