1 /****************************************************************************** 2 * 3 * Copyright (C) 1999-2014 Broadcom Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 #ifndef HCIDEFS_H 20 #define HCIDEFS_H 21 22 #include "common/bt_target.h" 23 24 #include "stack/bt_types.h" 25 26 #define HCI_PROTO_VERSION 0x01 /* Version for BT spec 1.1 */ 27 #define HCI_PROTO_VERSION_1_2 0x02 /* Version for BT spec 1.2 */ 28 #define HCI_PROTO_VERSION_2_0 0x03 /* Version for BT spec 2.0 */ 29 #define HCI_PROTO_VERSION_2_1 0x04 /* Version for BT spec 2.1 [Lisbon] */ 30 #define HCI_PROTO_VERSION_3_0 0x05 /* Version for BT spec 3.0 */ 31 #define HCI_PROTO_VERSION_4_0 0x06 /* Version for BT spec 4.0 */ 32 #define HCI_PROTO_VERSION_4_1 0x07 /* Version for BT spec 4.1 */ 33 #define HCI_PROTO_VERSION_4_2 0x08 /* Version for BT spec 4.2 */ 34 #define HCI_PROTO_REVISION 0x000C /* Current implementation version */ 35 /* 36 ** Definitions for HCI groups 37 */ 38 #define HCI_GRP_LINK_CONTROL_CMDS (0x01 << 10) /* 0x0400 */ 39 #define HCI_GRP_LINK_POLICY_CMDS (0x02 << 10) /* 0x0800 */ 40 #define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10) /* 0x0C00 */ 41 #define HCI_GRP_INFORMATIONAL_PARAMS (0x04 << 10) /* 0x1000 */ 42 #define HCI_GRP_STATUS_PARAMS (0x05 << 10) /* 0x1400 */ 43 #define HCI_GRP_TESTING_CMDS (0x06 << 10) /* 0x1800 */ 44 45 #define HCI_GRP_VENDOR_SPECIFIC (0x3F << 10) /* 0xFC00 */ 46 47 /* Group occupies high 6 bits of the HCI command rest is opcode itself */ 48 #define HCI_OGF(p) (UINT8)(0x003F & (p >> 10)) 49 #define HCI_OCF(p) ( 0x3FF & (p)) 50 51 /* 52 ** Definitions for Link Control Commands 53 */ 54 /* Following opcode is used only in command complete event for flow control */ 55 #define HCI_COMMAND_NONE 0x0000 56 57 /* Commands of HCI_GRP_LINK_CONTROL_CMDS group */ 58 #define HCI_INQUIRY (0x0001 | HCI_GRP_LINK_CONTROL_CMDS) 59 #define HCI_INQUIRY_CANCEL (0x0002 | HCI_GRP_LINK_CONTROL_CMDS) 60 #define HCI_PERIODIC_INQUIRY_MODE (0x0003 | HCI_GRP_LINK_CONTROL_CMDS) 61 #define HCI_EXIT_PERIODIC_INQUIRY_MODE (0x0004 | HCI_GRP_LINK_CONTROL_CMDS) 62 #define HCI_CREATE_CONNECTION (0x0005 | HCI_GRP_LINK_CONTROL_CMDS) 63 #define HCI_DISCONNECT (0x0006 | HCI_GRP_LINK_CONTROL_CMDS) 64 #define HCI_ADD_SCO_CONNECTION (0x0007 | HCI_GRP_LINK_CONTROL_CMDS) 65 #define HCI_CREATE_CONNECTION_CANCEL (0x0008 | HCI_GRP_LINK_CONTROL_CMDS) 66 #define HCI_ACCEPT_CONNECTION_REQUEST (0x0009 | HCI_GRP_LINK_CONTROL_CMDS) 67 #define HCI_REJECT_CONNECTION_REQUEST (0x000A | HCI_GRP_LINK_CONTROL_CMDS) 68 #define HCI_LINK_KEY_REQUEST_REPLY (0x000B | HCI_GRP_LINK_CONTROL_CMDS) 69 #define HCI_LINK_KEY_REQUEST_NEG_REPLY (0x000C | HCI_GRP_LINK_CONTROL_CMDS) 70 #define HCI_PIN_CODE_REQUEST_REPLY (0x000D | HCI_GRP_LINK_CONTROL_CMDS) 71 #define HCI_PIN_CODE_REQUEST_NEG_REPLY (0x000E | HCI_GRP_LINK_CONTROL_CMDS) 72 #define HCI_CHANGE_CONN_PACKET_TYPE (0x000F | HCI_GRP_LINK_CONTROL_CMDS) 73 #define HCI_AUTHENTICATION_REQUESTED (0x0011 | HCI_GRP_LINK_CONTROL_CMDS) 74 #define HCI_SET_CONN_ENCRYPTION (0x0013 | HCI_GRP_LINK_CONTROL_CMDS) 75 #define HCI_CHANGE_CONN_LINK_KEY (0x0015 | HCI_GRP_LINK_CONTROL_CMDS) 76 #define HCI_MASTER_LINK_KEY (0x0017 | HCI_GRP_LINK_CONTROL_CMDS) 77 #define HCI_RMT_NAME_REQUEST (0x0019 | HCI_GRP_LINK_CONTROL_CMDS) 78 #define HCI_RMT_NAME_REQUEST_CANCEL (0x001A | HCI_GRP_LINK_CONTROL_CMDS) 79 #define HCI_READ_RMT_FEATURES (0x001B | HCI_GRP_LINK_CONTROL_CMDS) 80 #define HCI_READ_RMT_EXT_FEATURES (0x001C | HCI_GRP_LINK_CONTROL_CMDS) 81 #define HCI_READ_RMT_VERSION_INFO (0x001D | HCI_GRP_LINK_CONTROL_CMDS) 82 #define HCI_READ_RMT_CLOCK_OFFSET (0x001F | HCI_GRP_LINK_CONTROL_CMDS) 83 #define HCI_READ_LMP_HANDLE (0x0020 | HCI_GRP_LINK_CONTROL_CMDS) 84 #define HCI_SETUP_ESCO_CONNECTION (0x0028 | HCI_GRP_LINK_CONTROL_CMDS) 85 #define HCI_ACCEPT_ESCO_CONNECTION (0x0029 | HCI_GRP_LINK_CONTROL_CMDS) 86 #define HCI_REJECT_ESCO_CONNECTION (0x002A | HCI_GRP_LINK_CONTROL_CMDS) 87 #define HCI_IO_CAPABILITY_REQUEST_REPLY (0x002B | HCI_GRP_LINK_CONTROL_CMDS) 88 #define HCI_USER_CONF_REQUEST_REPLY (0x002C | HCI_GRP_LINK_CONTROL_CMDS) 89 #define HCI_USER_CONF_VALUE_NEG_REPLY (0x002D | HCI_GRP_LINK_CONTROL_CMDS) 90 #define HCI_USER_PASSKEY_REQ_REPLY (0x002E | HCI_GRP_LINK_CONTROL_CMDS) 91 #define HCI_USER_PASSKEY_REQ_NEG_REPLY (0x002F | HCI_GRP_LINK_CONTROL_CMDS) 92 #define HCI_REM_OOB_DATA_REQ_REPLY (0x0030 | HCI_GRP_LINK_CONTROL_CMDS) 93 #define HCI_REM_OOB_DATA_REQ_NEG_REPLY (0x0033 | HCI_GRP_LINK_CONTROL_CMDS) 94 #define HCI_IO_CAP_REQ_NEG_REPLY (0x0034 | HCI_GRP_LINK_CONTROL_CMDS) 95 96 /* AMP HCI */ 97 #define HCI_CREATE_PHYSICAL_LINK (0x0035 | HCI_GRP_LINK_CONTROL_CMDS) 98 #define HCI_ACCEPT_PHYSICAL_LINK (0x0036 | HCI_GRP_LINK_CONTROL_CMDS) 99 #define HCI_DISCONNECT_PHYSICAL_LINK (0x0037 | HCI_GRP_LINK_CONTROL_CMDS) 100 #define HCI_CREATE_LOGICAL_LINK (0x0038 | HCI_GRP_LINK_CONTROL_CMDS) 101 #define HCI_ACCEPT_LOGICAL_LINK (0x0039 | HCI_GRP_LINK_CONTROL_CMDS) 102 #define HCI_DISCONNECT_LOGICAL_LINK (0x003A | HCI_GRP_LINK_CONTROL_CMDS) 103 #define HCI_LOGICAL_LINK_CANCEL (0x003B | HCI_GRP_LINK_CONTROL_CMDS) 104 #define HCI_FLOW_SPEC_MODIFY (0x003C | HCI_GRP_LINK_CONTROL_CMDS) 105 106 #define HCI_ENH_SETUP_ESCO_CONNECTION (0x003D | HCI_GRP_LINK_CONTROL_CMDS) 107 #define HCI_ENH_ACCEPT_ESCO_CONNECTION (0x003E | HCI_GRP_LINK_CONTROL_CMDS) 108 109 /* ConnectionLess Broadcast */ 110 #define HCI_TRUNCATED_PAGE (0x003F | HCI_GRP_LINK_CONTROL_CMDS) 111 #define HCI_TRUNCATED_PAGE_CANCEL (0x0040 | HCI_GRP_LINK_CONTROL_CMDS) 112 #define HCI_SET_CLB (0x0041 | HCI_GRP_LINK_CONTROL_CMDS) 113 #define HCI_RECEIVE_CLB (0x0042 | HCI_GRP_LINK_CONTROL_CMDS) 114 #define HCI_START_SYNC_TRAIN (0x0043 | HCI_GRP_LINK_CONTROL_CMDS) 115 #define HCI_RECEIVE_SYNC_TRAIN (0x0044 | HCI_GRP_LINK_CONTROL_CMDS) 116 117 #define HCI_LINK_CTRL_CMDS_FIRST HCI_INQUIRY 118 #define HCI_LINK_CTRL_CMDS_LAST HCI_RECEIVE_SYNC_TRAIN 119 120 /* Commands of HCI_GRP_LINK_POLICY_CMDS */ 121 #define HCI_HOLD_MODE (0x0001 | HCI_GRP_LINK_POLICY_CMDS) 122 #define HCI_SNIFF_MODE (0x0003 | HCI_GRP_LINK_POLICY_CMDS) 123 #define HCI_EXIT_SNIFF_MODE (0x0004 | HCI_GRP_LINK_POLICY_CMDS) 124 #define HCI_PARK_MODE (0x0005 | HCI_GRP_LINK_POLICY_CMDS) 125 #define HCI_EXIT_PARK_MODE (0x0006 | HCI_GRP_LINK_POLICY_CMDS) 126 #define HCI_QOS_SETUP (0x0007 | HCI_GRP_LINK_POLICY_CMDS) 127 #define HCI_ROLE_DISCOVERY (0x0009 | HCI_GRP_LINK_POLICY_CMDS) 128 #define HCI_SWITCH_ROLE (0x000B | HCI_GRP_LINK_POLICY_CMDS) 129 #define HCI_READ_POLICY_SETTINGS (0x000C | HCI_GRP_LINK_POLICY_CMDS) 130 #define HCI_WRITE_POLICY_SETTINGS (0x000D | HCI_GRP_LINK_POLICY_CMDS) 131 #define HCI_READ_DEF_POLICY_SETTINGS (0x000E | HCI_GRP_LINK_POLICY_CMDS) 132 #define HCI_WRITE_DEF_POLICY_SETTINGS (0x000F | HCI_GRP_LINK_POLICY_CMDS) 133 #define HCI_FLOW_SPECIFICATION (0x0010 | HCI_GRP_LINK_POLICY_CMDS) 134 #define HCI_SNIFF_SUB_RATE (0x0011 | HCI_GRP_LINK_POLICY_CMDS) 135 136 #define HCI_LINK_POLICY_CMDS_FIRST HCI_HOLD_MODE 137 #define HCI_LINK_POLICY_CMDS_LAST HCI_SNIFF_SUB_RATE 138 139 140 /* Commands of HCI_GRP_HOST_CONT_BASEBAND_CMDS */ 141 #define HCI_SET_EVENT_MASK (0x0001 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 142 #define HCI_RESET (0x0003 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 143 #define HCI_SET_EVENT_FILTER (0x0005 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 144 #define HCI_FLUSH (0x0008 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 145 #define HCI_READ_PIN_TYPE (0x0009 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 146 #define HCI_WRITE_PIN_TYPE (0x000A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 147 #define HCI_CREATE_NEW_UNIT_KEY (0x000B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 148 #define HCI_GET_MWS_TRANS_LAYER_CFG (0x000C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 149 #define HCI_READ_STORED_LINK_KEY (0x000D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 150 #define HCI_WRITE_STORED_LINK_KEY (0x0011 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 151 #define HCI_DELETE_STORED_LINK_KEY (0x0012 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 152 #define HCI_CHANGE_LOCAL_NAME (0x0013 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 153 #define HCI_READ_LOCAL_NAME (0x0014 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 154 #define HCI_READ_CONN_ACCEPT_TOUT (0x0015 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 155 #define HCI_WRITE_CONN_ACCEPT_TOUT (0x0016 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 156 #define HCI_READ_PAGE_TOUT (0x0017 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 157 #define HCI_WRITE_PAGE_TOUT (0x0018 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 158 #define HCI_READ_SCAN_ENABLE (0x0019 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 159 #define HCI_WRITE_SCAN_ENABLE (0x001A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 160 #define HCI_READ_PAGESCAN_CFG (0x001B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 161 #define HCI_WRITE_PAGESCAN_CFG (0x001C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 162 #define HCI_READ_INQUIRYSCAN_CFG (0x001D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 163 #define HCI_WRITE_INQUIRYSCAN_CFG (0x001E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 164 #define HCI_READ_AUTHENTICATION_ENABLE (0x001F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 165 #define HCI_WRITE_AUTHENTICATION_ENABLE (0x0020 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 166 #define HCI_READ_ENCRYPTION_MODE (0x0021 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 167 #define HCI_WRITE_ENCRYPTION_MODE (0x0022 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 168 #define HCI_READ_CLASS_OF_DEVICE (0x0023 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 169 #define HCI_WRITE_CLASS_OF_DEVICE (0x0024 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 170 #define HCI_READ_VOICE_SETTINGS (0x0025 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 171 #define HCI_WRITE_VOICE_SETTINGS (0x0026 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 172 #define HCI_READ_AUTO_FLUSH_TOUT (0x0027 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 173 #define HCI_WRITE_AUTO_FLUSH_TOUT (0x0028 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 174 #define HCI_READ_NUM_BCAST_REXMITS (0x0029 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 175 #define HCI_WRITE_NUM_BCAST_REXMITS (0x002A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 176 #define HCI_READ_HOLD_MODE_ACTIVITY (0x002B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 177 #define HCI_WRITE_HOLD_MODE_ACTIVITY (0x002C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 178 #define HCI_READ_TRANSMIT_POWER_LEVEL (0x002D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 179 #define HCI_READ_SCO_FLOW_CTRL_ENABLE (0x002E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 180 #define HCI_WRITE_SCO_FLOW_CTRL_ENABLE (0x002F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 181 #define HCI_SET_HC_TO_HOST_FLOW_CTRL (0x0031 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 182 #define HCI_HOST_BUFFER_SIZE (0x0033 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 183 #define HCI_HOST_NUM_PACKETS_DONE (0x0035 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 184 #define HCI_READ_LINK_SUPER_TOUT (0x0036 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 185 #define HCI_WRITE_LINK_SUPER_TOUT (0x0037 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 186 #define HCI_READ_NUM_SUPPORTED_IAC (0x0038 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 187 #define HCI_READ_CURRENT_IAC_LAP (0x0039 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 188 #define HCI_WRITE_CURRENT_IAC_LAP (0x003A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 189 #define HCI_READ_PAGESCAN_PERIOD_MODE (0x003B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 190 #define HCI_WRITE_PAGESCAN_PERIOD_MODE (0x003C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 191 #define HCI_READ_PAGESCAN_MODE (0x003D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 192 #define HCI_WRITE_PAGESCAN_MODE (0x003E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 193 #define HCI_SET_AFH_CHANNELS (0x003F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 194 195 #define HCI_READ_INQSCAN_TYPE (0x0042 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 196 #define HCI_WRITE_INQSCAN_TYPE (0x0043 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 197 #define HCI_READ_INQUIRY_MODE (0x0044 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 198 #define HCI_WRITE_INQUIRY_MODE (0x0045 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 199 #define HCI_READ_PAGESCAN_TYPE (0x0046 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 200 #define HCI_WRITE_PAGESCAN_TYPE (0x0047 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 201 #define HCI_READ_AFH_ASSESSMENT_MODE (0x0048 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 202 #define HCI_WRITE_AFH_ASSESSMENT_MODE (0x0049 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 203 #define HCI_READ_EXT_INQ_RESPONSE (0x0051 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 204 #define HCI_WRITE_EXT_INQ_RESPONSE (0x0052 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 205 #define HCI_REFRESH_ENCRYPTION_KEY (0x0053 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 206 #define HCI_READ_SIMPLE_PAIRING_MODE (0x0055 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 207 #define HCI_WRITE_SIMPLE_PAIRING_MODE (0x0056 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 208 #define HCI_READ_LOCAL_OOB_DATA (0x0057 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 209 #define HCI_READ_INQ_TX_POWER_LEVEL (0x0058 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 210 #define HCI_WRITE_INQ_TX_POWER_LEVEL (0x0059 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 211 #define HCI_READ_ERRONEOUS_DATA_RPT (0x005A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 212 #define HCI_WRITE_ERRONEOUS_DATA_RPT (0x005B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 213 #define HCI_ENHANCED_FLUSH (0x005F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 214 #define HCI_SEND_KEYPRESS_NOTIF (0x0060 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 215 216 217 /* AMP HCI */ 218 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0061 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 219 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0062 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 220 #define HCI_SET_EVENT_MASK_PAGE_2 (0x0063 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 221 #define HCI_READ_LOCATION_DATA (0x0064 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 222 #define HCI_WRITE_LOCATION_DATA (0x0065 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 223 #define HCI_READ_FLOW_CONTROL_MODE (0x0066 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 224 #define HCI_WRITE_FLOW_CONTROL_MODE (0x0067 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 225 #define HCI_READ_BE_FLUSH_TOUT (0x0069 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 226 #define HCI_WRITE_BE_FLUSH_TOUT (0x006A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 227 #define HCI_SHORT_RANGE_MODE (0x006B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) /* 802.11 only */ 228 #define HCI_READ_LE_HOST_SUPPORT (0x006C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 229 #define HCI_WRITE_LE_HOST_SUPPORT (0x006D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 230 231 232 /* MWS coexistence */ 233 #define HCI_SET_MWS_CHANNEL_PARAMETERS (0x006E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 234 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION (0x006F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 235 #define HCI_SET_MWS_SIGNALING (0x0070 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 236 #define HCI_SET_MWS_TRANSPORT_LAYER (0x0071 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 237 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE (0x0072 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 238 #define HCI_SET_MWS_PATTERN_CONFIGURATION (0x0073 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 239 240 /* Connectionless Broadcast */ 241 #define HCI_SET_RESERVED_LT_ADDR (0x0074 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 242 #define HCI_DELETE_RESERVED_LT_ADDR (0x0075 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 243 #define HCI_WRITE_CLB_DATA (0x0076 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 244 #define HCI_READ_SYNC_TRAIN_PARAM (0x0077 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 245 #define HCI_WRITE_SYNC_TRAIN_PARAM (0x0078 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 246 247 #define HCI_READ_SECURE_CONNS_SUPPORT (0x0079 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 248 #define HCI_WRITE_SECURE_CONNS_SUPPORT (0x007A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 249 #define HCI_CONT_BASEBAND_CMDS_FIRST HCI_SET_EVENT_MASK 250 #define HCI_CONT_BASEBAND_CMDS_LAST HCI_READ_SYNC_TRAIN_PARAM 251 252 253 /* Commands of HCI_GRP_INFORMATIONAL_PARAMS group */ 254 #define HCI_READ_LOCAL_VERSION_INFO (0x0001 | HCI_GRP_INFORMATIONAL_PARAMS) 255 #define HCI_READ_LOCAL_SUPPORTED_CMDS (0x0002 | HCI_GRP_INFORMATIONAL_PARAMS) 256 #define HCI_READ_LOCAL_FEATURES (0x0003 | HCI_GRP_INFORMATIONAL_PARAMS) 257 #define HCI_READ_LOCAL_EXT_FEATURES (0x0004 | HCI_GRP_INFORMATIONAL_PARAMS) 258 #define HCI_READ_BUFFER_SIZE (0x0005 | HCI_GRP_INFORMATIONAL_PARAMS) 259 #define HCI_READ_COUNTRY_CODE (0x0007 | HCI_GRP_INFORMATIONAL_PARAMS) 260 #define HCI_READ_BD_ADDR (0x0009 | HCI_GRP_INFORMATIONAL_PARAMS) 261 #define HCI_READ_DATA_BLOCK_SIZE (0x000A | HCI_GRP_INFORMATIONAL_PARAMS) 262 #define HCI_READ_LOCAL_SUPPORTED_CODECS (0x000B | HCI_GRP_INFORMATIONAL_PARAMS) 263 264 #define HCI_INFORMATIONAL_CMDS_FIRST HCI_READ_LOCAL_VERSION_INFO 265 #define HCI_INFORMATIONAL_CMDS_LAST HCI_READ_LOCAL_SUPPORTED_CODECS 266 267 268 /* Commands of HCI_GRP_STATUS_PARAMS group */ 269 #define HCI_READ_FAILED_CONTACT_COUNT (0x0001 | HCI_GRP_STATUS_PARAMS) 270 #define HCI_RESET_FAILED_CONTACT_COUNT (0x0002 | HCI_GRP_STATUS_PARAMS) 271 #define HCI_GET_LINK_QUALITY (0x0003 | HCI_GRP_STATUS_PARAMS) 272 #define HCI_READ_RSSI (0x0005 | HCI_GRP_STATUS_PARAMS) 273 #define HCI_READ_AFH_CH_MAP (0x0006 | HCI_GRP_STATUS_PARAMS) 274 #define HCI_READ_CLOCK (0x0007 | HCI_GRP_STATUS_PARAMS) 275 #define HCI_READ_ENCR_KEY_SIZE (0x0008 | HCI_GRP_STATUS_PARAMS) 276 277 /* AMP HCI */ 278 #define HCI_READ_LOCAL_AMP_INFO (0x0009 | HCI_GRP_STATUS_PARAMS) 279 #define HCI_READ_LOCAL_AMP_ASSOC (0x000A | HCI_GRP_STATUS_PARAMS) 280 #define HCI_WRITE_REMOTE_AMP_ASSOC (0x000B | HCI_GRP_STATUS_PARAMS) 281 282 #define HCI_STATUS_PARAMS_CMDS_FIRST HCI_READ_FAILED_CONTACT_COUNT 283 #define HCI_STATUS_PARAMS_CMDS_LAST HCI_WRITE_REMOTE_AMP_ASSOC 284 285 /* Commands of HCI_GRP_TESTING_CMDS group */ 286 #define HCI_READ_LOOPBACK_MODE (0x0001 | HCI_GRP_TESTING_CMDS) 287 #define HCI_WRITE_LOOPBACK_MODE (0x0002 | HCI_GRP_TESTING_CMDS) 288 #define HCI_ENABLE_DEV_UNDER_TEST_MODE (0x0003 | HCI_GRP_TESTING_CMDS) 289 #define HCI_WRITE_SIMP_PAIR_DEBUG_MODE (0x0004 | HCI_GRP_TESTING_CMDS) 290 291 /* AMP HCI */ 292 #define HCI_ENABLE_AMP_RCVR_REPORTS (0x0007 | HCI_GRP_TESTING_CMDS) 293 #define HCI_AMP_TEST_END (0x0008 | HCI_GRP_TESTING_CMDS) 294 #define HCI_AMP_TEST (0x0009 | HCI_GRP_TESTING_CMDS) 295 296 #define HCI_TESTING_CMDS_FIRST HCI_READ_LOOPBACK_MODE 297 #define HCI_TESTING_CMDS_LAST HCI_AMP_TEST 298 299 #define HCI_VENDOR_CMDS_FIRST 0x0001 300 #define HCI_VENDOR_CMDS_LAST 0xFFFF 301 #define HCI_VSC_MULTI_AV_HANDLE 0x0AAA 302 #define HCI_VSC_BURST_MODE_HANDLE 0x0BBB 303 304 /* BLE HCI */ 305 #define HCI_GRP_BLE_CMDS (0x08 << 10) 306 /* Commands of BLE Controller setup and configuration */ 307 #define HCI_BLE_SET_EVENT_MASK (0x0001 | HCI_GRP_BLE_CMDS) 308 #define HCI_BLE_READ_BUFFER_SIZE (0x0002 | HCI_GRP_BLE_CMDS) 309 #define HCI_BLE_READ_LOCAL_SPT_FEAT (0x0003 | HCI_GRP_BLE_CMDS) 310 #define HCI_BLE_WRITE_LOCAL_SPT_FEAT (0x0004 | HCI_GRP_BLE_CMDS) 311 #define HCI_BLE_WRITE_RANDOM_ADDR (0x0005 | HCI_GRP_BLE_CMDS) 312 #define HCI_BLE_WRITE_ADV_PARAMS (0x0006 | HCI_GRP_BLE_CMDS) 313 #define HCI_BLE_READ_ADV_CHNL_TX_POWER (0x0007 | HCI_GRP_BLE_CMDS) 314 #define HCI_BLE_WRITE_ADV_DATA (0x0008 | HCI_GRP_BLE_CMDS) 315 #define HCI_BLE_WRITE_SCAN_RSP_DATA (0x0009 | HCI_GRP_BLE_CMDS) 316 #define HCI_BLE_WRITE_ADV_ENABLE (0x000A | HCI_GRP_BLE_CMDS) 317 #define HCI_BLE_WRITE_SCAN_PARAMS (0x000B | HCI_GRP_BLE_CMDS) 318 #define HCI_BLE_WRITE_SCAN_ENABLE (0x000C | HCI_GRP_BLE_CMDS) 319 #define HCI_BLE_CREATE_LL_CONN (0x000D | HCI_GRP_BLE_CMDS) 320 #define HCI_BLE_CREATE_CONN_CANCEL (0x000E | HCI_GRP_BLE_CMDS) 321 #define HCI_BLE_READ_WHITE_LIST_SIZE (0x000F | HCI_GRP_BLE_CMDS) 322 #define HCI_BLE_CLEAR_WHITE_LIST (0x0010 | HCI_GRP_BLE_CMDS) 323 #define HCI_BLE_ADD_WHITE_LIST (0x0011 | HCI_GRP_BLE_CMDS) 324 #define HCI_BLE_REMOVE_WHITE_LIST (0x0012 | HCI_GRP_BLE_CMDS) 325 #define HCI_BLE_UPD_LL_CONN_PARAMS (0x0013 | HCI_GRP_BLE_CMDS) 326 #define HCI_BLE_SET_HOST_CHNL_CLASS (0x0014 | HCI_GRP_BLE_CMDS) 327 #define HCI_BLE_READ_CHNL_MAP (0x0015 | HCI_GRP_BLE_CMDS) 328 #define HCI_BLE_READ_REMOTE_FEAT (0x0016 | HCI_GRP_BLE_CMDS) 329 #define HCI_BLE_ENCRYPT (0x0017 | HCI_GRP_BLE_CMDS) 330 #define HCI_BLE_RAND (0x0018 | HCI_GRP_BLE_CMDS) 331 #define HCI_BLE_START_ENC (0x0019 | HCI_GRP_BLE_CMDS) 332 #define HCI_BLE_LTK_REQ_REPLY (0x001A | HCI_GRP_BLE_CMDS) 333 #define HCI_BLE_LTK_REQ_NEG_REPLY (0x001B | HCI_GRP_BLE_CMDS) 334 #define HCI_BLE_READ_SUPPORTED_STATES (0x001C | HCI_GRP_BLE_CMDS) 335 /*0x001D, 0x001E and 0x001F are reserved*/ 336 #define HCI_BLE_RECEIVER_TEST (0x001D | HCI_GRP_BLE_CMDS) 337 #define HCI_BLE_TRANSMITTER_TEST (0x001E | HCI_GRP_BLE_CMDS) 338 /* BLE TEST COMMANDS */ 339 #define HCI_BLE_TEST_END (0x001F | HCI_GRP_BLE_CMDS) 340 #define HCI_BLE_RC_PARAM_REQ_REPLY (0x0020 | HCI_GRP_BLE_CMDS) 341 #define HCI_BLE_RC_PARAM_REQ_NEG_REPLY (0x0021 | HCI_GRP_BLE_CMDS) 342 343 #define HCI_BLE_SET_DATA_LENGTH (0x0022 | HCI_GRP_BLE_CMDS) 344 #define HCI_BLE_READ_DEFAULT_DATA_LENGTH (0x0023 | HCI_GRP_BLE_CMDS) 345 #define HCI_BLE_WRITE_DEFAULT_DATA_LENGTH (0x0024 | HCI_GRP_BLE_CMDS) 346 347 #define HCI_BLE_ADD_DEV_RESOLVING_LIST (0x0027 | HCI_GRP_BLE_CMDS) 348 #define HCI_BLE_RM_DEV_RESOLVING_LIST (0x0028 | HCI_GRP_BLE_CMDS) 349 #define HCI_BLE_CLEAR_RESOLVING_LIST (0x0029 | HCI_GRP_BLE_CMDS) 350 #define HCI_BLE_READ_RESOLVING_LIST_SIZE (0x002A | HCI_GRP_BLE_CMDS) 351 #define HCI_BLE_READ_RESOLVABLE_ADDR_PEER (0x002B | HCI_GRP_BLE_CMDS) 352 #define HCI_BLE_READ_RESOLVABLE_ADDR_LOCAL (0x002C | HCI_GRP_BLE_CMDS) 353 #define HCI_BLE_SET_ADDR_RESOLUTION_ENABLE (0x002D | HCI_GRP_BLE_CMDS) 354 #define HCI_BLE_SET_RAND_PRIV_ADDR_TIMOUT (0x002E | HCI_GRP_BLE_CMDS) 355 #if (BLE_50_FEATURE_SUPPORT == TRUE) 356 #define HCI_BLE_READ_PHY (0x0030 | HCI_GRP_BLE_CMDS) 357 #define HCI_BLE_SET_DEFAULT_PHY (0x0031 | HCI_GRP_BLE_CMDS) 358 #define HCI_BLE_SET_PHY (0x0032 | HCI_GRP_BLE_CMDS) 359 #define HCI_BLE_ENH_RX_TEST (0x0033 | HCI_GRP_BLE_CMDS) 360 #define HCI_BLE_ENH_TX_TEST (0x0034 | HCI_GRP_BLE_CMDS) 361 #define HCI_BLE_SET_ADV_RAND_ADDR (0x0035 | HCI_GRP_BLE_CMDS) 362 #define HCI_BLE_SET_EXT_ADV_PARAM (0x0036 | HCI_GRP_BLE_CMDS) 363 #define HCI_BLE_SET_EXT_ADV_DATA (0x0037 | HCI_GRP_BLE_CMDS) 364 #define HCI_BLE_SET_EXT_SCAN_RSP_DATA (0x0038 | HCI_GRP_BLE_CMDS) 365 #define HCI_BLE_SET_EXT_ADV_ENABLE (0x0039 | HCI_GRP_BLE_CMDS) 366 #define HCI_BLE_RD_MAX_ADV_DATA_LEN (0x003A | HCI_GRP_BLE_CMDS) 367 #define HCI_BLE_RD_NUM_OF_ADV_SETS (0x003B | HCI_GRP_BLE_CMDS) 368 #define HCI_BLE_REMOVE_ADV_SET (0x003C | HCI_GRP_BLE_CMDS) 369 #define HCI_BLE_CLEAR_ADV_SETS (0x003D | HCI_GRP_BLE_CMDS) 370 #define HCI_BLE_SET_PERIOD_ADV_PARAMS (0x003E | HCI_GRP_BLE_CMDS) 371 #define HCI_BLE_SET_PERIOD_ADV_DATA (0x003F | HCI_GRP_BLE_CMDS) 372 #define HCI_BLE_SET_PERIOD_ADV_ENABLE (0x0040 | HCI_GRP_BLE_CMDS) 373 #define HCI_BLE_SET_EXT_SCAN_PARAMS (0x0041 | HCI_GRP_BLE_CMDS) 374 #define HCI_BLE_SET_EXT_SCAN_ENABLE (0x0042 | HCI_GRP_BLE_CMDS) 375 #define HCI_BLE_EXT_CREATE_CONN (0x0043 | HCI_GRP_BLE_CMDS) 376 #define HCI_BLE_PERIOD_ADV_CREATE_SYNC (0x0044 | HCI_GRP_BLE_CMDS) 377 #define HCI_BLE_PERIOD_ADV_CREATE_SYNC_CANCEL (0x0045 | HCI_GRP_BLE_CMDS) 378 #define HCI_BLE_PERIOD_ADV_TERM_SYNC (0x0046 | HCI_GRP_BLE_CMDS) 379 #define HCI_BLE_ADV_DEV_TO_PERIOD_ADV_LIST (0x0047 | HCI_GRP_BLE_CMDS) 380 #define HCI_BLE_REMOVE_DEV_FROM_PERIOD_ADV_LIST (0x0048 | HCI_GRP_BLE_CMDS) 381 #define HCI_BLE_CLEAR_PERIOD_ADV_LIST (0x0049 | HCI_GRP_BLE_CMDS) 382 #define HCI_BLE_RD_PERIOD_ADV_LIST_SIZE (0x004A | HCI_GRP_BLE_CMDS) 383 #define HCI_BLE_RD_TRANSMIT_POWER (0x004B | HCI_GRP_BLE_CMDS) 384 #define HCI_BLE_RD_RF_PATH_COMPENSATION (0x004C | HCI_GRP_BLE_CMDS) 385 #define HCI_BLE_WR_RF_PATH_COMPENSATION (0x004D | HCI_GRP_BLE_CMDS) 386 #define HCI_BLE_SET_PRIVACY_MODE (0x004E | HCI_GRP_BLE_CMDS) 387 #endif // #if (BLE_50_FEATURE_SUPPORT == TRUE) 388 // Vendor OGF define 389 #define HCI_VENDOR_OGF 0x3F 390 391 // ESP vendor group define 392 #define HCI_ESP_GROUP_COMMON 0x01 393 #define HCI_ESP_GROUP_BLE 0x02 394 #define HCI_ESP_GROUP_BT 0x03 395 #define HCI_ESP_GROUP_END 0x07 396 397 //ESP common subcode define 398 #define HCI_SUBCODE_COMMON_INIT 0x00 399 #define HCI_SUBCODE_COMMON_ECHO 0x01 400 #define HCI_SUBCODE_COMMON_COEX_STATUS 0x02 401 #define HCI_SUBCODE_COMMON_MAX 0x7F 402 403 //ESP BLE subcode define 404 #define HCI_SUBCODE_BLE_INIT 0x00 405 #define HCI_SUBCODE_BLE_MULTI_ADV 0x01 406 #define HCI_SUBCODE_BLE_BATCH_SCAN 0x02 407 #define HCI_SUBCODE_BLE_ADV_FILTER 0x03 408 #define HCI_SUBCODE_BLE_TRACK_ADV 0x04 409 #define HCI_SUBCODE_BLE_ENERGY_INFO 0x05 410 #define HCI_SUBCODE_BLE_EXTENDED_SCAN_PARAMS 0x06 411 #define HCI_SUBCODE_BLE_LONG_ADV 0x07 412 #define HCI_SUBCODE_BLE_DUPLICATE_EXCEPTIONAL_LIST 0x08 413 #define HCI_SUBCODE_BLE_SET_ADV_FLOW_CONTROL 0x09 414 #define HCI_SUBCODE_BLE_ADV_REPORT_FLOW_CONTROL 0x0A 415 #define HCI_SUBCODE_BLE_MAX 0x7F 416 417 //ESP BT subcode define 418 #define HCI_SUBCODE_BT_INIT 0x00 419 #define HCI_SUBCODE_BT_MAX 0x7F 420 421 #define HCI_ESP_VENDOR_OPCODE_BUILD(ogf, group, subcode) ((ogf << 10) | (group <<7) | (subcode << 0)) 422 /* 423 * | OGF | VENDIOR GROUP | GROUP SUBCODE | 424 * | 1 1 1 1 1 1 | 0 0 0 | X X X X X X X | Already Exist 425 * | 1 1 1 1 1 1 | 0 0 1 | X X X X X X X | ESP VENDOR COMMON HCI CMD 426 * | 1 1 1 1 1 1 | 0 1 0 | X X X X X X X | ESP VENDOR BLE HCI CMD 427 * | 1 1 1 1 1 1 | 0 1 1 | X X X X X X X | ESP VENDOR BT HCI CMD 428 * | 1 1 1 1 1 1 | 1 0 0 | X X X X X X X | RESERVED FOR FUTURE USE 429 * | 1 1 1 1 1 1 | 1 0 1 | X X X X X X X | RESERVED FOR FUTURE USE 430 * | 1 1 1 1 1 1 | 1 1 0 | X X X X X X X | RESERVED FOR FUTURE USE 431 * | 1 1 1 1 1 1 | 1 1 1 | X X X X X X X | RESERVED FOR FUTURE USE 432 */ 433 434 // ESP COMMON HCI CMD 435 #define HCI_VENDOR_COMMON_ECHO_CMD_OPCODE HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_COMMON, HCI_SUBCODE_COMMON_ECHO) 436 // Set/clear coex schm status 437 #define HCI_VENDOR_COMMON_COEX_STATUS_CMD_OPCODE HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_COMMON, HCI_SUBCODE_COMMON_COEX_STATUS) 438 439 //ESP BLE HCI CMD 440 /* Multi adv OCF */ 441 #define HCI_BLE_MULTI_ADV_OCF HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_MULTI_ADV) 442 /* Batch scan OCF */ 443 #define HCI_BLE_BATCH_SCAN_OCF HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_BATCH_SCAN) 444 /* ADV filter OCF */ 445 #define HCI_BLE_ADV_FILTER_OCF HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_ADV_FILTER) 446 /* Tracking OCF */ 447 #define HCI_BLE_TRACK_ADV_OCF HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_TRACK_ADV) 448 /* Energy info OCF */ 449 #define HCI_BLE_ENERGY_INFO_OCF HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_ENERGY_INFO) 450 /* Extended BLE Scan parameters OCF */ 451 #define HCI_BLE_EXTENDED_SCAN_PARAMS_OCF HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_EXTENDED_SCAN_PARAMS) 452 /* Long BLE Adv data OCF */ 453 #define HCI_VENDOR_BLE_LONG_ADV_DATA HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_LONG_ADV) 454 /* BLE update duplicate scan exceptional list */ 455 #define HCI_VENDOR_BLE_UPDATE_DUPLICATE_EXCEPTIONAL_LIST HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_DUPLICATE_EXCEPTIONAL_LIST) 456 #define HCI_VENDOR_BLE_SET_ADV_FLOW_CONTROL HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_SET_ADV_FLOW_CONTROL) 457 #define HCI_VENDOR_BLE_ADV_REPORT_FLOW_CONTROL HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_ADV_REPORT_FLOW_CONTROL) 458 //ESP BT HCI CMD 459 460 /* subcode for multi adv feature */ 461 #define BTM_BLE_MULTI_ADV_SET_PARAM 0x01 462 #define BTM_BLE_MULTI_ADV_WRITE_ADV_DATA 0x02 463 #define BTM_BLE_MULTI_ADV_WRITE_SCAN_RSP_DATA 0x03 464 #define BTM_BLE_MULTI_ADV_SET_RANDOM_ADDR 0x04 465 #define BTM_BLE_MULTI_ADV_ENB 0x05 466 467 /* multi adv VSE subcode */ 468 #define HCI_VSE_SUBCODE_BLE_MULTI_ADV_ST_CHG 0x55 /* multi adv instance state change */ 469 470 /* subcode for batch scan feature */ 471 #define BTM_BLE_BATCH_SCAN_ENB_DISAB_CUST_FEATURE 0x01 472 #define BTM_BLE_BATCH_SCAN_SET_STORAGE_PARAM 0x02 473 #define BTM_BLE_BATCH_SCAN_SET_PARAMS 0x03 474 #define BTM_BLE_BATCH_SCAN_READ_RESULTS 0x04 475 476 /* batch scan VSE subcode */ 477 #define HCI_VSE_SUBCODE_BLE_THRESHOLD_SUB_EVT 0x54 /* Threshold event */ 478 479 /* tracking sub event */ 480 #define HCI_VSE_SUBCODE_BLE_TRACKING_SUB_EVT 0x56 /* Tracking event */ 481 482 /* LE supported states definition */ 483 #define HCI_LE_ADV_STATE 0x00000001 484 #define HCI_LE_SCAN_STATE 0x00000002 485 #define HCI_LE_INIT_STATE 0x00000004 486 #define HCI_LE_CONN_SL_STATE 0x00000008 487 #define HCI_LE_ADV_SCAN_STATE 0x00000010 488 #define HCI_LE_ADV_INIT_STATE 0x00000020 489 #define HCI_LE_ADV_MA_STATE 0x00000040 490 #define HCI_LE_ADV_SL_STATE 0x00000080 491 #define HCI_LE_SCAN_INIT_STATE 0x00000100 492 #define HCI_LE_SCAN_MA_STATE 0x00000200 493 #define HCI_LE_SCAN_SL_STATE 0x00000400 494 #define HCI_LE_INIT_MA_STATE 0x00000800 495 496 /* LE Supported States */ 497 /* Non Connectable Adv state is supported. 0x0000000000000001 */ 498 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK 0x01 499 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF 0 500 #define HCI_LE_STATES_NON_CONN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK) 501 502 /*Scanneable Connectable Adv state is supported. 0x0000000000000002 */ 503 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASK 0x02 504 #define HCI_SUPP_LE_STATESSCAN_ADV_OFF 0 505 #define HCI_LE_STATES_SCAN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATESSCAN_ADV_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASK) 506 507 /* Connectable Adv state is supported. 0x0000000000000004 */ 508 #define HCI_SUPP_LE_STATES_CONN_ADV_MASK 0x04 509 #define HCI_SUPP_LE_STATES_CONN_ADV_OFF 0 510 #define HCI_LE_STATES_CONN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASK) 511 512 /* Hi duty Cycle Directed Adv state is supported. 0x0000000000000008 */ 513 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK 0x08 514 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF 0 515 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK) 516 517 /* Passive Scan state is supported. 0x0000000000000010 */ 518 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASK 0x10 519 #define HCI_SUPP_LE_STATES_PASS_SCAN_OFF 0 520 #define HCI_LE_STATES_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASK) 521 522 /* Active Scan state is supported. 0x0000000000000020 */ 523 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK 0x20 524 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF 0 525 #define HCI_LE_STATES_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK) 526 527 /* Initiating state is supported. 0x0000000000000040 (or connection state in master role is also supported) */ 528 #define HCI_SUPP_LE_STATES_INIT_MASK 0x40 529 #define HCI_SUPP_LE_STATES_INIT_OFF 0 530 #define HCI_LE_STATES_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_OFF] & HCI_SUPP_LE_STATES_INIT_MASK) 531 532 /*connection state in slave role is also supported. 0x0000000000000080 */ 533 #define HCI_SUPP_LE_STATES_SLAVE_MASK 0x80 534 #define HCI_SUPP_LE_STATES_SLAVE_OFF 0 535 #define HCI_LE_STATES_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SLAVE_OFF] & HCI_SUPP_LE_STATES_SLAVE_MASK) 536 537 /* Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000100 */ 538 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK 0x01 539 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF 1 540 #define HCI_LE_STATES_NON_CONN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK) 541 542 /*Scannable Adv state and Passive Scanning State combination is supported. 0x0000000000000200 */ 543 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK 0x02 544 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF 1 545 #define HCI_LE_STATES_SCAN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK) 546 547 /*Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000400 */ 548 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK 0x04 549 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF 1 550 #define HCI_LE_STATES_CONN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK) 551 552 /*High Duty Cycl Directed ADv and Passive Scanning State combination is supported. 0x0000000000000800 */ 553 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK 0x08 554 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF 1 555 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF) 556 557 /*Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000001000 */ 558 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK 0x10 559 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF 1 560 #define HCI_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK) 561 562 /*Scannable Adv state and Active Scanning State combination is supported. 0x0000000000002000 */ 563 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK 0x20 564 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF 1 565 #define HCI_LE_STATES_SCAN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK) 566 567 /*Connectable Adv state and Active Scanning State combination is supported. 0x0000000000004000 */ 568 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK 0x40 569 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF 1 570 #define HCI_LE_STATES_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK) 571 572 /*High Duty Cycl Directed ADv and ACtive Scanning State combination is supported. 0x0000000000008000 */ 573 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK 0x80 574 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF 1 575 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF) 576 577 /*Non-Connectable Adv state and Initiating State combination is supported. 0x0000000000010000 */ 578 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK 0x01 579 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF 2 580 #define HCI_LE_STATES_NON_CONN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF] & HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK) 581 582 /* Scannable Adv state and Initiating State combination is supported. 0x0000000000020000 */ 583 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK 0x02 584 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF 2 585 #define HCI_LE_STATES_SCAN_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK) 586 587 /* Non-Connectable Adv state and Master Role combination is supported. 0x0000000000040000 */ 588 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_MASK 0x04 589 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_OFF 2 590 #define HCI_LE_STATES_NON_CONN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_MASK) 591 592 /*Scannable Adv state and Master Role combination is supported. 0x0000000000040000 */ 593 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_MASK 0x08 594 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_OFF 2 595 #define HCI_LE_STATES_SCAN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_MASK) 596 597 /* Non-Connectable Adv and Slave Role combination is supported. 0x000000000100000 */ 598 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_MASK 0x10 599 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_OFF 2 600 #define HCI_LE_STATES_NON_CONN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_MASK) 601 602 /*Scannable Adv and Slave Role combination is supported. 0x000000000200000 */ 603 #define HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_MASK 0x20 604 #define HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_OFF 2 605 #define HCI_LE_STATES_SCAN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_MASK) 606 607 /*Passive Scan and Initiating State combination is supported. 0x000000000400000 */ 608 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK 0x40 609 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF 2 610 #define HCI_LE_STATES_PASS_SCAN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK) 611 612 /*Active Scan and Initiating State combination is supported. 0x000000000800000 */ 613 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK 0x80 614 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF 2 615 #define HCI_LE_STATES_ACTIVE_SCAN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK) 616 617 /*Passive Scan and Master Role combination is supported. 0x000000001000000 */ 618 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_MASK 0x01 619 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_OFF 3 620 #define HCI_LE_STATES_PASS_SCAN_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_MASK) 621 622 /*Active Scan and Master Role combination is supported. 0x000000002000000 */ 623 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_MASK 0x02 624 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_OFF 3 625 #define HCI_LE_STATES_ACTIVE_SCAN_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_MASK) 626 627 /*Passive Scan and Slave Role combination is supported. 0x000000004000000 */ 628 #define HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_MASK 0x04 629 #define HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_OFF 3 630 #define HCI_LE_STATES_PASS_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_MASK) 631 632 /*Active Scan and Slave Role combination is supported. 0x000000008000000 */ 633 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_MASK 0x08 634 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_OFF 3 635 #define HCI_LE_STATES_ACTIVE_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_MASK) 636 637 /*Link Layer Topology Added States Combo */ 638 /*Initiating State and Master Role combination supported. 639 Master Role and Master Role combination is also supported. 0x0000000010000000 */ 640 #define HCI_SUPP_LE_STATES_INIT_MASTER_MASK 0x10 641 #define HCI_SUPP_LE_STATES_INIT_MASTER_OFF 3 642 #define HCI_LE_STATES_INIT_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_MASTER_OFF] & HCI_SUPP_LE_STATES_INIT_MASTER_MASK) 643 644 /*Low Duty Cycle Directed Advertising State . 0x0000000020000000 */ 645 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASK 0x20 646 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_OFF 3 647 #define HCI_LE_STATES_LOW_DUTY_DIR_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_MASK) 648 649 /*Low Duty Cycle Directed Advertising State and Passive scan combination. 0x0000000040000000 */ 650 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_MASK 0x40 651 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_OFF 3 652 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_MASK) 653 654 /*Low Duty Cycle Directed Advertising State and Active scan combination . 0x0000000080000000 */ 655 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_MASK 0x80 656 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_OFF 3 657 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_MASK) 658 659 /* Connectable Advertising State and Initiating State combination supported. 0x0000000100000000 */ 660 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK 0x01 661 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF 4 662 #define HCI_LE_STATES_CONN_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK) 663 664 /* High Duty Cycle Directed Advertising State and Initiating State combination supported. */ 665 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK 0x02 666 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF 4 667 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK) 668 669 /* Low Duty Cycle Directed Advertising State and Initiating State combination supported.*/ 670 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK 0x04 671 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF 4 672 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK) 673 674 /* Connectable Advertising State and Master Role combination supported.*/ 675 #define HCI_SUPP_LE_STATES_CONN_ADV_MASTER_MASK 0x08 676 #define HCI_SUPP_LE_STATES_CONN_ADV_MASTER_OFF 4 677 #define HCI_LE_STATES_CONN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASTER_MASK) 678 679 /* High Duty Cycle Directed Advertising State and Master Role combination supported.*/ 680 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_MASK 0x10 681 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_OFF 4 682 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_MASK) 683 684 /* Low Duty Cycle Directed Advertising State and Master Role combination supported.*/ 685 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_MASK 0x20 686 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_OFF 4 687 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_MASK) 688 689 /* Connectable Advertising State and Slave Role combination supported. */ 690 #define HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_MASK 0x40 691 #define HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_OFF 4 692 #define HCI_LE_STATES_CONN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_MASK) 693 694 /* High Duty Cycle Directed Advertising State and slave Role combination supported.*/ 695 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_MASK 0x80 696 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_OFF 4 697 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_MASK) 698 699 /* Low Duty Cycle Directed Advertising State and slave Role combination supported.*/ 700 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_MASK 0x01 701 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_OFF 5 702 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_MASK) 703 704 /* Initiating State and Slave Role combination supported. 705 Master Role and Slave Role combination also supported. 706 */ 707 #define HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_MASK 0x02 708 #define HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_OFF 5 709 #define HCI_LE_STATES_INIT_MASTER_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_OFF] & HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_MASK) 710 711 /* 712 ** Definitions for HCI Events 713 */ 714 #define HCI_INQUIRY_COMP_EVT 0x01 715 #define HCI_INQUIRY_RESULT_EVT 0x02 716 #define HCI_CONNECTION_COMP_EVT 0x03 717 #define HCI_CONNECTION_REQUEST_EVT 0x04 718 #define HCI_DISCONNECTION_COMP_EVT 0x05 719 #define HCI_AUTHENTICATION_COMP_EVT 0x06 720 #define HCI_RMT_NAME_REQUEST_COMP_EVT 0x07 721 #define HCI_ENCRYPTION_CHANGE_EVT 0x08 722 #define HCI_CHANGE_CONN_LINK_KEY_EVT 0x09 723 #define HCI_MASTER_LINK_KEY_COMP_EVT 0x0A 724 #define HCI_READ_RMT_FEATURES_COMP_EVT 0x0B 725 #define HCI_READ_RMT_VERSION_COMP_EVT 0x0C 726 #define HCI_QOS_SETUP_COMP_EVT 0x0D 727 #define HCI_COMMAND_COMPLETE_EVT 0x0E 728 #define HCI_COMMAND_STATUS_EVT 0x0F 729 #define HCI_HARDWARE_ERROR_EVT 0x10 730 #define HCI_FLUSH_OCCURED_EVT 0x11 731 #define HCI_ROLE_CHANGE_EVT 0x12 732 #define HCI_NUM_COMPL_DATA_PKTS_EVT 0x13 733 #define HCI_MODE_CHANGE_EVT 0x14 734 #define HCI_RETURN_LINK_KEYS_EVT 0x15 735 #define HCI_PIN_CODE_REQUEST_EVT 0x16 736 #define HCI_LINK_KEY_REQUEST_EVT 0x17 737 #define HCI_LINK_KEY_NOTIFICATION_EVT 0x18 738 #define HCI_LOOPBACK_COMMAND_EVT 0x19 739 #define HCI_DATA_BUF_OVERFLOW_EVT 0x1A 740 #define HCI_MAX_SLOTS_CHANGED_EVT 0x1B 741 #define HCI_READ_CLOCK_OFF_COMP_EVT 0x1C 742 #define HCI_CONN_PKT_TYPE_CHANGE_EVT 0x1D 743 #define HCI_QOS_VIOLATION_EVT 0x1E 744 #define HCI_PAGE_SCAN_MODE_CHANGE_EVT 0x1F 745 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EVT 0x20 746 #define HCI_FLOW_SPECIFICATION_COMP_EVT 0x21 747 #define HCI_INQUIRY_RSSI_RESULT_EVT 0x22 748 #define HCI_READ_RMT_EXT_FEATURES_COMP_EVT 0x23 749 #define HCI_ESCO_CONNECTION_COMP_EVT 0x2C 750 #define HCI_ESCO_CONNECTION_CHANGED_EVT 0x2D 751 #define HCI_SNIFF_SUB_RATE_EVT 0x2E 752 #define HCI_EXTENDED_INQUIRY_RESULT_EVT 0x2F 753 #define HCI_ENCRYPTION_KEY_REFRESH_COMP_EVT 0x30 754 #define HCI_IO_CAPABILITY_REQUEST_EVT 0x31 755 #define HCI_IO_CAPABILITY_RESPONSE_EVT 0x32 756 #define HCI_USER_CONFIRMATION_REQUEST_EVT 0x33 757 #define HCI_USER_PASSKEY_REQUEST_EVT 0x34 758 #define HCI_REMOTE_OOB_DATA_REQUEST_EVT 0x35 759 #define HCI_SIMPLE_PAIRING_COMPLETE_EVT 0x36 760 #define HCI_LINK_SUPER_TOUT_CHANGED_EVT 0x38 761 #define HCI_ENHANCED_FLUSH_COMPLETE_EVT 0x39 762 #define HCI_USER_PASSKEY_NOTIFY_EVT 0x3B 763 #define HCI_KEYPRESS_NOTIFY_EVT 0x3C 764 #define HCI_RMT_HOST_SUP_FEAT_NOTIFY_EVT 0x3D 765 766 /*#define HCI_GENERIC_AMP_LINK_KEY_NOTIF_EVT 0x3E Removed from spec */ 767 #define HCI_PHYSICAL_LINK_COMP_EVT 0x40 768 #define HCI_CHANNEL_SELECTED_EVT 0x41 769 #define HCI_DISC_PHYSICAL_LINK_COMP_EVT 0x42 770 #define HCI_PHY_LINK_LOSS_EARLY_WARNING_EVT 0x43 771 #define HCI_PHY_LINK_RECOVERY_EVT 0x44 772 #define HCI_LOGICAL_LINK_COMP_EVT 0x45 773 #define HCI_DISC_LOGICAL_LINK_COMP_EVT 0x46 774 #define HCI_FLOW_SPEC_MODIFY_COMP_EVT 0x47 775 #define HCI_NUM_COMPL_DATA_BLOCKS_EVT 0x48 776 #define HCI_SHORT_RANGE_MODE_COMPLETE_EVT 0x4C 777 #define HCI_AMP_STATUS_CHANGE_EVT 0x4D 778 #define HCI_SET_TRIGGERED_CLOCK_CAPTURE_EVT 0x4E 779 780 /* ULP HCI Event */ 781 #define HCI_BLE_EVENT 0x3e 782 /* ULP Event sub code */ 783 #define HCI_BLE_CONN_COMPLETE_EVT 0x01 784 #define HCI_BLE_ADV_PKT_RPT_EVT 0x02 785 #define HCI_BLE_LL_CONN_PARAM_UPD_EVT 0x03 786 #define HCI_BLE_READ_REMOTE_FEAT_CMPL_EVT 0x04 787 #define HCI_BLE_LTK_REQ_EVT 0x05 788 #define HCI_BLE_RC_PARAM_REQ_EVT 0x06 789 #define HCI_BLE_DATA_LENGTH_CHANGE_EVT 0x07 790 #define HCI_BLE_ENHANCED_CONN_COMPLETE_EVT 0x0a 791 #define HCI_BLE_DIRECT_ADV_EVT 0x0b 792 /* ESP vendor BLE Event sub code */ 793 #define HCI_BLE_ADV_DISCARD_REPORT_EVT 0XF0 794 #if (BLE_50_FEATURE_SUPPORT == TRUE) 795 #define HCI_BLE_PHY_UPDATE_COMPLETE_EVT 0x0c 796 #define HCI_BLE_EXT_ADV_REPORT_EVT 0x0d 797 #define HCI_BLE_PERIOD_ADV_SYNC_ESTAB_EVT 0x0e 798 #define HCI_BLE_PERIOD_ADV_REPORT_EVT 0x0f 799 #define HCI_BLE_PERIOD_ADV_SYNC_LOST_EVT 0x10 800 #define HCI_BLE_SCAN_TIMEOUT_EVT 0x11 801 #define HCI_BLE_ADV_SET_TERMINATED_EVT 0x12 802 #define HCI_BLE_SCAN_REQ_RECEIVED_EVT 0x13 803 #define HCI_BLE_CHANNEL_SELECT_ALG 0x14 804 #endif // #if (BLE_50_FEATURE_SUPPORT == TRUE) 805 806 /* Definitions for LE Channel Map */ 807 #define HCI_BLE_CHNL_MAP_SIZE 5 808 809 #define HCI_VENDOR_SPECIFIC_EVT 0xFF /* Vendor specific events */ 810 #define HCI_NAP_TRACE_EVT 0xFF /* was define 0xFE, 0xFD, change to 0xFF 811 because conflict w/ TCI_EVT and per 812 specification compliant */ 813 814 /* 815 ** Defentions for HCI Error Codes that are past in the events 816 */ 817 #define HCI_SUCCESS 0x00 818 #define HCI_PENDING 0x00 819 #define HCI_ERR_ILLEGAL_COMMAND 0x01 820 #define HCI_ERR_NO_CONNECTION 0x02 821 #define HCI_ERR_HW_FAILURE 0x03 822 #define HCI_ERR_PAGE_TIMEOUT 0x04 823 #define HCI_ERR_AUTH_FAILURE 0x05 824 #define HCI_ERR_KEY_MISSING 0x06 825 #define HCI_ERR_MEMORY_FULL 0x07 826 #define HCI_ERR_CONNECTION_TOUT 0x08 827 #define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 828 #define HCI_ERR_MAX_NUM_OF_SCOS 0x0A 829 #define HCI_ERR_CONNECTION_EXISTS 0x0B 830 #define HCI_ERR_COMMAND_DISALLOWED 0x0C 831 #define HCI_ERR_HOST_REJECT_RESOURCES 0x0D 832 #define HCI_ERR_HOST_REJECT_SECURITY 0x0E 833 #define HCI_ERR_HOST_REJECT_DEVICE 0x0F 834 #define HCI_ERR_HOST_TIMEOUT 0x10 835 #define HCI_ERR_UNSUPPORTED_VALUE 0x11 836 #define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 837 #define HCI_ERR_PEER_USER 0x13 838 #define HCI_ERR_PEER_LOW_RESOURCES 0x14 839 #define HCI_ERR_PEER_POWER_OFF 0x15 840 #define HCI_ERR_CONN_CAUSE_LOCAL_HOST 0x16 841 #define HCI_ERR_REPEATED_ATTEMPTS 0x17 842 #define HCI_ERR_PAIRING_NOT_ALLOWED 0x18 843 #define HCI_ERR_UNKNOWN_LMP_PDU 0x19 844 #define HCI_ERR_UNSUPPORTED_REM_FEATURE 0x1A 845 #define HCI_ERR_SCO_OFFSET_REJECTED 0x1B 846 #define HCI_ERR_SCO_INTERVAL_REJECTED 0x1C 847 #define HCI_ERR_SCO_AIR_MODE 0x1D 848 #define HCI_ERR_INVALID_LMP_PARAM 0x1E 849 #define HCI_ERR_UNSPECIFIED 0x1F 850 #define HCI_ERR_UNSUPPORTED_LMP_PARAMETERS 0x20 851 #define HCI_ERR_ROLE_CHANGE_NOT_ALLOWED 0x21 852 #define HCI_ERR_LMP_RESPONSE_TIMEOUT 0x22 853 #define HCI_ERR_LMP_ERR_TRANS_COLLISION 0x23 854 #define HCI_ERR_LMP_PDU_NOT_ALLOWED 0x24 855 #define HCI_ERR_ENCRY_MODE_NOT_ACCEPTABLE 0x25 856 #define HCI_ERR_UNIT_KEY_USED 0x26 857 #define HCI_ERR_QOS_NOT_SUPPORTED 0x27 858 #define HCI_ERR_INSTANT_PASSED 0x28 859 #define HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED 0x29 860 #define HCI_ERR_DIFF_TRANSACTION_COLLISION 0x2A 861 #define HCI_ERR_UNDEFINED_0x2B 0x2B 862 #define HCI_ERR_QOS_UNACCEPTABLE_PARAM 0x2C 863 #define HCI_ERR_QOS_REJECTED 0x2D 864 #define HCI_ERR_CHAN_CLASSIF_NOT_SUPPORTED 0x2E 865 #define HCI_ERR_INSUFFCIENT_SECURITY 0x2F 866 #define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 867 #define HCI_ERR_UNDEFINED_0x31 0x31 868 #define HCI_ERR_ROLE_SWITCH_PENDING 0x32 869 #define HCI_ERR_UNDEFINED_0x33 0x33 870 #define HCI_ERR_RESERVED_SLOT_VIOLATION 0x34 871 #define HCI_ERR_ROLE_SWITCH_FAILED 0x35 872 #define HCI_ERR_INQ_RSP_DATA_TOO_LARGE 0x36 873 #define HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED 0x37 874 #define HCI_ERR_HOST_BUSY_PAIRING 0x38 875 #define HCI_ERR_REJ_NO_SUITABLE_CHANNEL 0x39 876 #define HCI_ERR_CONTROLLER_BUSY 0x3A 877 #define HCI_ERR_UNACCEPT_CONN_INTERVAL 0x3B 878 #define HCI_ERR_DIRECTED_ADVERTISING_TIMEOUT 0x3C 879 #define HCI_ERR_CONN_TOUT_DUE_TO_MIC_FAILURE 0x3D 880 #define HCI_ERR_CONN_FAILED_ESTABLISHMENT 0x3E 881 #define HCI_ERR_MAC_CONNECTION_FAILED 0x3F 882 883 /* ConnectionLess Broadcast errors */ 884 #define HCI_ERR_LT_ADDR_ALREADY_IN_USE 0x40 885 #define HCI_ERR_LT_ADDR_NOT_ALLOCATED 0x41 886 #define HCI_ERR_CLB_NOT_ENABLED 0x42 887 #define HCI_ERR_CLB_DATA_TOO_BIG 0x43 888 889 #define HCI_ERR_MAX_ERR 0x43 890 891 //ESP vendor error code 892 #define HCI_ERR_ESP_VENDOR_FAIL 0xE0 893 894 #define HCI_HINT_TO_RECREATE_AMP_PHYS_LINK 0xFF 895 #if (BLE_50_FEATURE_SUPPORT == TRUE) 896 typedef UINT8 tHCI_STATUS; 897 #endif // #if (BLE_50_FEATURE_SUPPORT == TRUE) 898 899 /* 900 ** Definitions for HCI enable event 901 */ 902 #define HCI_INQUIRY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000001) 903 #define HCI_INQUIRY_RESULT_EV(p) (*((UINT32 *)(p)) & 0x00000002) 904 #define HCI_CONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000004) 905 #define HCI_CONNECTION_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00000008) 906 #define HCI_DISCONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000010) 907 #define HCI_AUTHENTICATION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000020) 908 #define HCI_RMT_NAME_REQUEST_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000040) 909 #define HCI_CHANGE_CONN_ENCRPT_ENABLE_EV(p) (*((UINT32 *)(p)) & 0x00000080) 910 #define HCI_CHANGE_CONN_LINK_KEY_EV(p) (*((UINT32 *)(p)) & 0x00000100) 911 #define HCI_MASTER_LINK_KEY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000200) 912 #define HCI_READ_RMT_FEATURES_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000400) 913 #define HCI_READ_RMT_VERSION_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000800) 914 #define HCI_QOS_SETUP_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00001000) 915 #define HCI_COMMAND_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00002000) 916 #define HCI_COMMAND_STATUS_EV(p) (*((UINT32 *)(p)) & 0x00004000) 917 #define HCI_HARDWARE_ERROR_EV(p) (*((UINT32 *)(p)) & 0x00008000) 918 #define HCI_FLASH_OCCURED_EV(p) (*((UINT32 *)(p)) & 0x00010000) 919 #define HCI_ROLE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00020000) 920 #define HCI_NUM_COMPLETED_PKTS_EV(p) (*((UINT32 *)(p)) & 0x00040000) 921 #define HCI_MODE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00080000) 922 #define HCI_RETURN_LINK_KEYS_EV(p) (*((UINT32 *)(p)) & 0x00100000) 923 #define HCI_PIN_CODE_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00200000) 924 #define HCI_LINK_KEY_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00400000) 925 #define HCI_LINK_KEY_NOTIFICATION_EV(p) (*((UINT32 *)(p)) & 0x00800000) 926 #define HCI_LOOPBACK_COMMAND_EV(p) (*((UINT32 *)(p)) & 0x01000000) 927 #define HCI_DATA_BUF_OVERFLOW_EV(p) (*((UINT32 *)(p)) & 0x02000000) 928 #define HCI_MAX_SLOTS_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x04000000) 929 #define HCI_READ_CLOCK_OFFSET_COMP_EV(p) (*((UINT32 *)(p)) & 0x08000000) 930 #define HCI_CONN_PKT_TYPE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x10000000) 931 #define HCI_QOS_VIOLATION_EV(p) (*((UINT32 *)(p)) & 0x20000000) 932 #define HCI_PAGE_SCAN_MODE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x40000000) 933 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EV(p) (*((UINT32 *)(p)) & 0x80000000) 934 935 /* the default event mask for 2.1+EDR (Lisbon) does not include Lisbon events */ 936 #define HCI_DEFAULT_EVENT_MASK_0 0xFFFFFFFF 937 #define HCI_DEFAULT_EVENT_MASK_1 0x00001FFF 938 939 /* the event mask for 2.0 + EDR and later (includes Lisbon events) */ 940 #define HCI_LISBON_EVENT_MASK_0 0xFFFFFFFF 941 #define HCI_LISBON_EVENT_MASK_1 0x1DBFFFFF 942 #define HCI_LISBON_EVENT_MASK "\x0D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 943 #define HCI_LISBON_EVENT_MASK_EXT "\x1D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 944 #define HCI_DUMO_EVENT_MASK_EXT "\x3D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 945 /* 0x00001FFF FFFFFFFF Default - no Lisbon events 946 0x00000800 00000000 Synchronous Connection Complete Event 947 0x00001000 00000000 Synchronous Connection Changed Event 948 0x00002000 00000000 Sniff Subrate Event 949 0x00004000 00000000 Extended Inquiry Result Event 950 0x00008000 00000000 Encryption Key Refresh Complete Event 951 0x00010000 00000000 IO Capability Request Event 952 0x00020000 00000000 IO Capability Response Event 953 0x00040000 00000000 User Confirmation Request Event 954 0x00080000 00000000 User Passkey Request Event 955 0x00100000 00000000 Remote OOB Data Request Event 956 0x00200000 00000000 Simple Pairing Complete Event 957 0x00400000 00000000 Generic AMP Link Key Notification Event 958 0x00800000 00000000 Link Supervision Timeout Changed Event 959 0x01000000 00000000 Enhanced Flush Complete Event 960 0x04000000 00000000 User Passkey Notification Event 961 0x08000000 00000000 Keypress Notification Event 962 0x10000000 00000000 Remote Host Supported Features Notification Event 963 0x20000000 00000000 LE Meta Event 964 */ 965 966 #define HCI_LE_ONLY_EVENT_MASK "\x20\x00\x80\x00\x02\x00\x88\x90" 967 /* 0x00000000 00000010 Disconnection complete event 968 0x00000000 00000080 Encryption change event 969 0x00000000 00000800 Read remote version information complete event 970 0x00000000 00008000 Hardware error event 971 0x00000000 02000000 Data buffer overflow event 972 0x00008000 00000000 Encryption key refresh complete event 973 0x20000000 00000000 LE Meta Event 974 */ 975 976 /* the event mask for AMP controllers */ 977 #define HCI_AMP_EVENT_MASK_3_0 "\x00\x00\x00\x00\x00\x00\x3F\xFF" 978 979 /* 0x0000000000000000 No events specified (default) 980 0x0000000000000001 Physical Link Complete Event 981 0x0000000000000002 Channel Selected Event 982 0x0000000000000004 Disconnection Physical Link Event 983 0x0000000000000008 Physical Link Loss Early Warning Event 984 0x0000000000000010 Physical Link Recovery Event 985 0x0000000000000020 Logical Link Complete Event 986 0x0000000000000040 Disconnection Logical Link Complete Event 987 0x0000000000000080 Flow Spec Modify Complete Event 988 0x0000000000000100 Number of Completed Data Blocks Event 989 0x0000000000000200 AMP Start Test Event 990 0x0000000000000400 AMP Test End Event 991 0x0000000000000800 AMP Receiver Report Event 992 0x0000000000001000 Short Range Mode Change Complete Event 993 0x0000000000002000 AMP Status Change Event 994 */ 995 996 /* the event mask page 2 (CLB + CSA4) for BR/EDR controller */ 997 #define HCI_PAGE_2_EVENT_MASK "\x00\x00\x00\x00\x00\x7F\xC0\x00" 998 /* 0x0000000000004000 Triggered Clock Capture Event 999 0x0000000000008000 Sync Train Complete Event 1000 0x0000000000010000 Sync Train Received Event 1001 0x0000000000020000 Connectionless Broadcast Receive Event 1002 0x0000000000040000 Connectionless Broadcast Timeout Event 1003 0x0000000000080000 Truncated Page Complete Event 1004 0x0000000000100000 Salve Page Response Timeout Event 1005 0x0000000000200000 Connectionless Broadcast Channel Map Change Event 1006 0x0000000000400000 Inquiry Response Notification Event 1007 */ 1008 #if BLE_PRIVACY_SPT == TRUE 1009 /* BLE event mask */ 1010 #define HCI_BLE_EVENT_MASK_DEF "\x00\x00\x00\x00\x00\x00\x07\xff" 1011 #else 1012 #define HCI_BLE_EVENT_MASK_DEF "\x00\x00\x00\x00\x00\x00\x00\x7f" 1013 #endif 1014 /* 1015 ** Definitions for packet type masks (BT1.2 and BT2.0 definitions) 1016 */ 1017 #define HCI_PKT_TYPES_MASK_NO_2_DH1 0x0002 1018 #define HCI_PKT_TYPES_MASK_NO_3_DH1 0x0004 1019 #define HCI_PKT_TYPES_MASK_DM1 0x0008 1020 #define HCI_PKT_TYPES_MASK_DH1 0x0010 1021 #define HCI_PKT_TYPES_MASK_HV1 0x0020 1022 #define HCI_PKT_TYPES_MASK_HV2 0x0040 1023 #define HCI_PKT_TYPES_MASK_HV3 0x0080 1024 #define HCI_PKT_TYPES_MASK_NO_2_DH3 0x0100 1025 #define HCI_PKT_TYPES_MASK_NO_3_DH3 0x0200 1026 #define HCI_PKT_TYPES_MASK_DM3 0x0400 1027 #define HCI_PKT_TYPES_MASK_DH3 0x0800 1028 #define HCI_PKT_TYPES_MASK_NO_2_DH5 0x1000 1029 #define HCI_PKT_TYPES_MASK_NO_3_DH5 0x2000 1030 #define HCI_PKT_TYPES_MASK_DM5 0x4000 1031 #define HCI_PKT_TYPES_MASK_DH5 0x8000 1032 1033 /* Packet type should be one of valid but at least one should be specified */ 1034 #define HCI_VALID_SCO_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_HV1 \ 1035 | HCI_PKT_TYPES_MASK_HV2 \ 1036 | HCI_PKT_TYPES_MASK_HV3)) == 0)) \ 1037 && ((t) != 0)) 1038 1039 1040 1041 1042 1043 /* Packet type should not be invalid and at least one should be specified */ 1044 #define HCI_VALID_ACL_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_DM1 \ 1045 | HCI_PKT_TYPES_MASK_DH1 \ 1046 | HCI_PKT_TYPES_MASK_DM3 \ 1047 | HCI_PKT_TYPES_MASK_DH3 \ 1048 | HCI_PKT_TYPES_MASK_DM5 \ 1049 | HCI_PKT_TYPES_MASK_DH5 \ 1050 | HCI_PKT_TYPES_MASK_NO_2_DH1 \ 1051 | HCI_PKT_TYPES_MASK_NO_3_DH1 \ 1052 | HCI_PKT_TYPES_MASK_NO_2_DH3 \ 1053 | HCI_PKT_TYPES_MASK_NO_3_DH3 \ 1054 | HCI_PKT_TYPES_MASK_NO_2_DH5 \ 1055 | HCI_PKT_TYPES_MASK_NO_3_DH5 )) == 0)) \ 1056 && (((t) & (HCI_PKT_TYPES_MASK_DM1 \ 1057 | HCI_PKT_TYPES_MASK_DH1 \ 1058 | HCI_PKT_TYPES_MASK_DM3 \ 1059 | HCI_PKT_TYPES_MASK_DH3 \ 1060 | HCI_PKT_TYPES_MASK_DM5 \ 1061 | HCI_PKT_TYPES_MASK_DH5)) != 0)) 1062 1063 /* 1064 ** Definitions for eSCO packet type masks (BT1.2 and BT2.0 definitions) 1065 */ 1066 #define HCI_ESCO_PKT_TYPES_MASK_HV1 0x0001 1067 #define HCI_ESCO_PKT_TYPES_MASK_HV2 0x0002 1068 #define HCI_ESCO_PKT_TYPES_MASK_HV3 0x0004 1069 #define HCI_ESCO_PKT_TYPES_MASK_EV3 0x0008 1070 #define HCI_ESCO_PKT_TYPES_MASK_EV4 0x0010 1071 #define HCI_ESCO_PKT_TYPES_MASK_EV5 0x0020 1072 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV3 0x0040 1073 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV3 0x0080 1074 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV5 0x0100 1075 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV5 0x0200 1076 1077 /* Packet type should be one of valid but at least one should be specified for 1.2 */ 1078 #define HCI_VALID_ESCO_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_EV3 \ 1079 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 1080 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 1081 && ((t) != 0))/* Packet type should be one of valid but at least one should be specified */ 1082 1083 #define HCI_VALID_ESCO_SCOPKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 1084 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 1085 | HCI_ESCO_PKT_TYPES_MASK_HV3)) == 0)) \ 1086 && ((t) != 0)) 1087 1088 #define HCI_VALID_SCO_ALL_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 1089 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 1090 | HCI_ESCO_PKT_TYPES_MASK_HV3 \ 1091 | HCI_ESCO_PKT_TYPES_MASK_EV3 \ 1092 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 1093 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 1094 && ((t) != 0)) 1095 1096 /* 1097 ** Define parameters to allow role switch during create connection 1098 */ 1099 #define HCI_CR_CONN_NOT_ALLOW_SWITCH 0x00 1100 #define HCI_CR_CONN_ALLOW_SWITCH 0x01 1101 1102 /* 1103 ** Hold Mode command destination 1104 */ 1105 #define HOLD_MODE_DEST_LOCAL_DEVICE 0x00 1106 #define HOLD_MODE_DEST_RMT_DEVICE 0x01 1107 1108 /* 1109 ** Definitions for different HCI parameters 1110 */ 1111 #define HCI_PER_INQ_MIN_MAX_PERIOD 0x0003 1112 #define HCI_PER_INQ_MAX_MAX_PERIOD 0xFFFF 1113 #define HCI_PER_INQ_MIN_MIN_PERIOD 0x0002 1114 #define HCI_PER_INQ_MAX_MIN_PERIOD 0xFFFE 1115 1116 #define HCI_MAX_INQUIRY_LENGTH 0x30 1117 1118 #define HCI_MIN_INQ_LAP 0x9E8B00 1119 #define HCI_MAX_INQ_LAP 0x9E8B3F 1120 1121 /* HCI role defenitions */ 1122 #define HCI_ROLE_MASTER 0x00 1123 #define HCI_ROLE_SLAVE 0x01 1124 #define HCI_ROLE_UNKNOWN 0xff 1125 1126 /* HCI mode defenitions */ 1127 #define HCI_MODE_ACTIVE 0x00 1128 #define HCI_MODE_HOLD 0x01 1129 #define HCI_MODE_SNIFF 0x02 1130 #define HCI_MODE_PARK 0x03 1131 1132 /* HCI Flow Control Mode defenitions */ 1133 #define HCI_PACKET_BASED_FC_MODE 0x00 1134 #define HCI_BLOCK_BASED_FC_MODE 0x01 1135 1136 /* Define Packet types as requested by the Host */ 1137 #define HCI_ACL_PKT_TYPE_NONE 0x0000 1138 #define HCI_ACL_PKT_TYPE_DM1 0x0008 1139 #define HCI_ACL_PKT_TYPE_DH1 0x0010 1140 #define HCI_ACL_PKT_TYPE_AUX1 0x0200 1141 #define HCI_ACL_PKT_TYPE_DM3 0x0400 1142 #define HCI_ACL_PKT_TYPE_DH3 0x0800 1143 #define HCI_ACL_PKT_TYPE_DM5 0x4000 1144 #define HCI_ACL_PKT_TYPE_DH5 0x8000 1145 1146 /* Define key type in the Master Link Key command */ 1147 #define HCI_USE_SEMI_PERMANENT_KEY 0x00 1148 #define HCI_USE_TEMPORARY_KEY 0x01 1149 1150 /* Page scan period modes */ 1151 #define HCI_PAGE_SCAN_REP_MODE_R0 0x00 1152 #define HCI_PAGE_SCAN_REP_MODE_R1 0x01 1153 #define HCI_PAGE_SCAN_REP_MODE_R2 0x02 1154 1155 /* Define limits for page scan repetition modes */ 1156 #define HCI_PAGE_SCAN_R1_LIMIT 0x0800 1157 #define HCI_PAGE_SCAN_R2_LIMIT 0x1000 1158 1159 /* Page scan period modes */ 1160 #define HCI_PAGE_SCAN_PER_MODE_P0 0x00 1161 #define HCI_PAGE_SCAN_PER_MODE_P1 0x01 1162 #define HCI_PAGE_SCAN_PER_MODE_P2 0x02 1163 1164 /* Page scan modes */ 1165 #define HCI_MANDATARY_PAGE_SCAN_MODE 0x00 1166 #define HCI_OPTIONAL_PAGE_SCAN_MODE1 0x01 1167 #define HCI_OPTIONAL_PAGE_SCAN_MODE2 0x02 1168 #define HCI_OPTIONAL_PAGE_SCAN_MODE3 0x03 1169 1170 /* Page and inquiry scan types */ 1171 #define HCI_SCAN_TYPE_STANDARD 0x00 1172 #define HCI_SCAN_TYPE_INTERLACED 0x01 /* 1.2 devices or later */ 1173 #define HCI_DEF_SCAN_TYPE HCI_SCAN_TYPE_STANDARD 1174 1175 /* Definitions for quality of service service types */ 1176 #define HCI_SERVICE_NO_TRAFFIC 0x00 1177 #define HCI_SERVICE_BEST_EFFORT 0x01 1178 #define HCI_SERVICE_GUARANTEED 0x02 1179 1180 #define HCI_QOS_LATENCY_DO_NOT_CARE 0xFFFFFFFF 1181 #define HCI_QOS_DELAY_DO_NOT_CARE 0xFFFFFFFF 1182 1183 /* Definitions for Flow Specification */ 1184 #define HCI_FLOW_SPEC_LATENCY_DO_NOT_CARE 0xFFFFFFFF 1185 1186 /* Definitions for AFH Channel Map */ 1187 #define HCI_AFH_CHANNEL_MAP_LEN 10 1188 1189 /* Definitions for Extended Inquiry Response */ 1190 #define HCI_EXT_INQ_RESPONSE_LEN 240 1191 #define HCI_EIR_FLAGS_TYPE BT_EIR_FLAGS_TYPE 1192 #define HCI_EIR_MORE_16BITS_UUID_TYPE BT_EIR_MORE_16BITS_UUID_TYPE 1193 #define HCI_EIR_COMPLETE_16BITS_UUID_TYPE BT_EIR_COMPLETE_16BITS_UUID_TYPE 1194 #define HCI_EIR_MORE_32BITS_UUID_TYPE BT_EIR_MORE_32BITS_UUID_TYPE 1195 #define HCI_EIR_COMPLETE_32BITS_UUID_TYPE BT_EIR_COMPLETE_32BITS_UUID_TYPE 1196 #define HCI_EIR_MORE_128BITS_UUID_TYPE BT_EIR_MORE_128BITS_UUID_TYPE 1197 #define HCI_EIR_COMPLETE_128BITS_UUID_TYPE BT_EIR_COMPLETE_128BITS_UUID_TYPE 1198 #define HCI_EIR_SHORTENED_LOCAL_NAME_TYPE BT_EIR_SHORTENED_LOCAL_NAME_TYPE 1199 #define HCI_EIR_COMPLETE_LOCAL_NAME_TYPE BT_EIR_COMPLETE_LOCAL_NAME_TYPE 1200 #define HCI_EIR_TX_POWER_LEVEL_TYPE BT_EIR_TX_POWER_LEVEL_TYPE 1201 #define HCI_EIR_URL_TYPE BT_EIR_URL_TYPE 1202 #define HCI_EIR_MANUFACTURER_SPECIFIC_TYPE BT_EIR_MANUFACTURER_SPECIFIC_TYPE 1203 #define HCI_EIR_OOB_BD_ADDR_TYPE BT_EIR_OOB_BD_ADDR_TYPE 1204 #define HCI_EIR_OOB_COD_TYPE BT_EIR_OOB_COD_TYPE 1205 #define HCI_EIR_OOB_SSP_HASH_C_TYPE BT_EIR_OOB_SSP_HASH_C_TYPE 1206 #define HCI_EIR_OOB_SSP_RAND_R_TYPE BT_EIR_OOB_SSP_RAND_R_TYPE 1207 1208 /* Definitions for Write Simple Pairing Mode */ 1209 #define HCI_SP_MODE_UNDEFINED 0x00 1210 #define HCI_SP_MODE_ENABLED 0x01 1211 1212 /* Definitions for Write Simple Pairing Debug Mode */ 1213 #define HCI_SPD_MODE_DISABLED 0x00 1214 #define HCI_SPD_MODE_ENABLED 0x01 1215 1216 /* Definitions for Write Secure Connections Host Support */ 1217 #define HCI_SC_MODE_DISABLED 0x00 1218 #define HCI_SC_MODE_ENABLED 0x01 1219 1220 /* Definitions for IO Capability Response/Command */ 1221 #define HCI_IO_CAP_DISPLAY_ONLY 0x00 1222 #define HCI_IO_CAP_DISPLAY_YESNO 0x01 1223 #define HCI_IO_CAP_KEYBOARD_ONLY 0x02 1224 #define HCI_IO_CAP_NO_IO 0x03 1225 1226 #define HCI_OOB_AUTH_DATA_NOT_PRESENT 0x00 1227 #define HCI_OOB_REM_AUTH_DATA_PRESENT 0x01 1228 1229 #define HCI_MITM_PROTECT_NOT_REQUIRED 0x00 1230 #define HCI_MITM_PROTECT_REQUIRED 0x01 1231 1232 1233 /* Policy settings status */ 1234 #define HCI_DISABLE_ALL_LM_MODES 0x0000 1235 #define HCI_ENABLE_MASTER_SLAVE_SWITCH 0x0001 1236 #define HCI_ENABLE_HOLD_MODE 0x0002 1237 #define HCI_ENABLE_SNIFF_MODE 0x0004 1238 #define HCI_ENABLE_PARK_MODE 0x0008 1239 1240 /* By default allow switch, because host can not allow that */ 1241 /* that until he created the connection */ 1242 #define HCI_DEFAULT_POLICY_SETTINGS HCI_DISABLE_ALL_LM_MODES 1243 1244 /* Filters that are sent in set filter command */ 1245 #define HCI_FILTER_TYPE_CLEAR_ALL 0x00 1246 #define HCI_FILTER_INQUIRY_RESULT 0x01 1247 #define HCI_FILTER_CONNECTION_SETUP 0x02 1248 1249 #define HCI_FILTER_COND_NEW_DEVICE 0x00 1250 #define HCI_FILTER_COND_DEVICE_CLASS 0x01 1251 #define HCI_FILTER_COND_BD_ADDR 0x02 1252 1253 #define HCI_DO_NOT_AUTO_ACCEPT_CONNECT 1 1254 #define HCI_DO_AUTO_ACCEPT_CONNECT 2 /* role switch disabled */ 1255 #define HCI_DO_AUTO_ACCEPT_CONNECT_RS 3 /* role switch enabled (1.1 errata 1115) */ 1256 1257 /* Auto accept flags */ 1258 #define HCI_AUTO_ACCEPT_OFF 0x00 1259 #define HCI_AUTO_ACCEPT_ACL_CONNECTIONS 0x01 1260 #define HCI_AUTO_ACCEPT_SCO_CONNECTIONS 0x02 1261 1262 /* PIN type */ 1263 #define HCI_PIN_TYPE_VARIABLE 0 1264 #define HCI_PIN_TYPE_FIXED 1 1265 1266 /* Loopback Modes */ 1267 #define HCI_LOOPBACK_MODE_DISABLED 0 1268 #define HCI_LOOPBACK_MODE_LOCAL 1 1269 #define HCI_LOOPBACK_MODE_REMOTE 2 1270 1271 #define SLOTS_PER_10MS 16 /* 0.625 ms slots in a 10 ms tick */ 1272 1273 /* Maximum connection accept timeout in 0.625msec */ 1274 #define HCI_MAX_CONN_ACCEPT_TOUT 0xB540 /* 29 sec */ 1275 #define HCI_DEF_CONN_ACCEPT_TOUT 0x1F40 /* 5 sec */ 1276 1277 /* Page timeout is used in LC only and LC is counting down slots not using OS */ 1278 #define HCI_DEFAULT_PAGE_TOUT 0x2000 /* 5.12 sec (in slots) */ 1279 1280 /* Scan enable flags */ 1281 #define HCI_NO_SCAN_ENABLED 0x00 1282 #define HCI_INQUIRY_SCAN_ENABLED 0x01 1283 #define HCI_PAGE_SCAN_ENABLED 0x02 1284 1285 /* Pagescan timer definitions in 0.625 ms */ 1286 #define HCI_MIN_PAGESCAN_INTERVAL 0x12 /* 11.25 ms */ 1287 #define HCI_MAX_PAGESCAN_INTERVAL 0x1000 /* 2.56 sec */ 1288 #define HCI_DEF_PAGESCAN_INTERVAL 0x0800 /* 1.28 sec */ 1289 1290 /* Parameter for pagescan window is passed to LC and is kept in slots */ 1291 #define HCI_MIN_PAGESCAN_WINDOW 0x11 /* 10.625 ms */ 1292 #define HCI_MAX_PAGESCAN_WINDOW 0x1000 /* 2.56 sec */ 1293 #define HCI_DEF_PAGESCAN_WINDOW 0x12 /* 11.25 ms */ 1294 1295 /* Inquiryscan timer definitions in 0.625 ms */ 1296 #define HCI_MIN_INQUIRYSCAN_INTERVAL 0x12 /* 11.25 ms */ 1297 #define HCI_MAX_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 1298 #define HCI_DEF_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 1299 1300 /* Parameter for inquiryscan window is passed to LC and is kept in slots */ 1301 #define HCI_MIN_INQUIRYSCAN_WINDOW 0x11 /* 10.625 ms */ 1302 #define HCI_MAX_INQUIRYSCAN_WINDOW 0x1000 /* 2.56 sec */ 1303 #define HCI_DEF_INQUIRYSCAN_WINDOW 0x12 /* 11.25 ms */ 1304 1305 /* Encryption modes */ 1306 #define HCI_ENCRYPT_MODE_DISABLED 0x00 1307 #define HCI_ENCRYPT_MODE_POINT_TO_POINT 0x01 1308 #define HCI_ENCRYPT_MODE_ALL 0x02 1309 1310 /* Voice settings */ 1311 #define HCI_INP_CODING_LINEAR 0x0000 /* 0000000000 */ 1312 #define HCI_INP_CODING_U_LAW 0x0100 /* 0100000000 */ 1313 #define HCI_INP_CODING_A_LAW 0x0200 /* 1000000000 */ 1314 #define HCI_INP_CODING_MASK 0x0300 /* 1100000000 */ 1315 1316 #define HCI_INP_DATA_FMT_1S_COMPLEMENT 0x0000 /* 0000000000 */ 1317 #define HCI_INP_DATA_FMT_2S_COMPLEMENT 0x0040 /* 0001000000 */ 1318 #define HCI_INP_DATA_FMT_SIGN_MAGNITUDE 0x0080 /* 0010000000 */ 1319 #define HCI_INP_DATA_FMT_UNSIGNED 0x00c0 /* 0011000000 */ 1320 #define HCI_INP_DATA_FMT_MASK 0x00c0 /* 0011000000 */ 1321 1322 #define HCI_INP_SAMPLE_SIZE_8BIT 0x0000 /* 0000000000 */ 1323 #define HCI_INP_SAMPLE_SIZE_16BIT 0x0020 /* 0000100000 */ 1324 #define HCI_INP_SAMPLE_SIZE_MASK 0x0020 /* 0000100000 */ 1325 1326 #define HCI_INP_LINEAR_PCM_BIT_POS_MASK 0x001c /* 0000011100 */ 1327 #define HCI_INP_LINEAR_PCM_BIT_POS_OFFS 2 1328 1329 #define HCI_AIR_CODING_FORMAT_CVSD 0x0000 /* 0000000000 */ 1330 #define HCI_AIR_CODING_FORMAT_U_LAW 0x0001 /* 0000000001 */ 1331 #define HCI_AIR_CODING_FORMAT_A_LAW 0x0002 /* 0000000010 */ 1332 #define HCI_AIR_CODING_FORMAT_TRANSPNT 0x0003 /* 0000000011 */ 1333 #define HCI_AIR_CODING_FORMAT_MASK 0x0003 /* 0000000011 */ 1334 1335 /* default 0001100000 */ 1336 #define HCI_DEFAULT_VOICE_SETTINGS (HCI_INP_CODING_LINEAR \ 1337 | HCI_INP_DATA_FMT_2S_COMPLEMENT \ 1338 | HCI_INP_SAMPLE_SIZE_16BIT \ 1339 | HCI_AIR_CODING_FORMAT_CVSD) 1340 1341 #define HCI_CVSD_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_CVSD) 1342 #define HCI_U_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_U_LAW) 1343 #define HCI_A_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_A_LAW) 1344 #define HCI_TRANSPNT_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_TRANSPNT) 1345 1346 /* Retransmit timer definitions in 0.625 */ 1347 #define HCI_MAX_AUTO_FLUSH_TOUT 0x07FF 1348 #define HCI_DEFAULT_AUTO_FLUSH_TOUT 0 /* No auto flush */ 1349 1350 /* Broadcast retransmitions */ 1351 #define HCI_DEFAULT_NUM_BCAST_RETRAN 1 1352 1353 /* Define broadcast data types as passed in the hci data packet */ 1354 #define HCI_DATA_POINT_TO_POINT 0x00 1355 #define HCI_DATA_ACTIVE_BCAST 0x01 1356 #define HCI_DATA_PICONET_BCAST 0x02 1357 1358 /* Hold mode activity */ 1359 #define HCI_MAINTAIN_CUR_POWER_STATE 0x00 1360 #define HCI_SUSPEND_PAGE_SCAN 0x01 1361 #define HCI_SUSPEND_INQUIRY_SCAN 0x02 1362 #define HCI_SUSPEND_PERIODIC_INQUIRIES 0x04 1363 1364 /* Default Link Supervision timeoout */ 1365 #define HCI_DEFAULT_INACT_TOUT 0x7D00 /* BR/EDR (20 seconds) */ 1366 #define HCI_DEFAULT_AMP_INACT_TOUT 0x3E80 /* AMP (10 seconds) */ 1367 1368 /* Read transmit power level parameter */ 1369 #define HCI_READ_CURRENT 0x00 1370 #define HCI_READ_MAXIMUM 0x01 1371 1372 /* Link types for connection complete event */ 1373 #define HCI_LINK_TYPE_SCO 0x00 1374 #define HCI_LINK_TYPE_ACL 0x01 1375 #define HCI_LINK_TYPE_ESCO 0x02 1376 1377 /* Link Key Notification Event (Key Type) definitions */ 1378 #define HCI_LKEY_TYPE_COMBINATION 0x00 1379 #define HCI_LKEY_TYPE_LOCAL_UNIT 0x01 1380 #define HCI_LKEY_TYPE_REMOTE_UNIT 0x02 1381 #define HCI_LKEY_TYPE_DEBUG_COMB 0x03 1382 #define HCI_LKEY_TYPE_UNAUTH_COMB 0x04 1383 #define HCI_LKEY_TYPE_AUTH_COMB 0x05 1384 #define HCI_LKEY_TYPE_CHANGED_COMB 0x06 1385 #define HCI_LKEY_TYPE_UNAUTH_COMB_P_256 0x07 1386 #define HCI_LKEY_TYPE_AUTH_COMB_P_256 0x08 1387 1388 /* Internal definitions - not used over HCI */ 1389 #define HCI_LKEY_TYPE_AMP_WIFI 0x80 1390 #define HCI_LKEY_TYPE_AMP_UWB 0x81 1391 #define HCI_LKEY_TYPE_UNKNOWN 0xff 1392 1393 /* Read Local Version HCI Version return values (Command Complete Event) */ 1394 #define HCI_VERSION_1_0B 0x00 1395 #define HCI_VERSION_1_1 0x01 1396 1397 /* Define an invalid value for a handle */ 1398 #define HCI_INVALID_HANDLE 0xFFFF 1399 1400 /* Define max ammount of data in the HCI command */ 1401 #define HCI_COMMAND_SIZE 255 1402 1403 /* Define the preamble length for all HCI Commands. 1404 ** This is 2-bytes for opcode and 1 byte for length 1405 */ 1406 #define HCIC_PREAMBLE_SIZE 3 1407 1408 /* Define the preamble length for all HCI Events 1409 ** This is 1-byte for opcode and 1 byte for length 1410 */ 1411 #define HCIE_PREAMBLE_SIZE 2 1412 #define HCI_SCO_PREAMBLE_SIZE 3 1413 #define HCI_DATA_PREAMBLE_SIZE 4 1414 1415 /* local Bluetooth controller id for AMP HCI */ 1416 #define LOCAL_BR_EDR_CONTROLLER_ID 0 1417 1418 /* controller id types for AMP HCI */ 1419 #define HCI_CONTROLLER_TYPE_BR_EDR 0 1420 #define HCI_CONTROLLER_TYPE_802_11 1 1421 #define HCI_CONTROLLER_TYPE_ECMA 2 1422 #define HCI_MAX_CONTROLLER_TYPES 3 1423 1424 /* ConnectionLess Broadcast */ 1425 #define HCI_CLB_DISABLE 0x00 1426 #define HCI_CLB_ENABLE 0x01 1427 1428 /* ConnectionLess Broadcast Data fragment */ 1429 #define HCI_CLB_FRAGMENT_CONT 0x00 1430 #define HCI_CLB_FRAGMENT_START 0x01 1431 #define HCI_CLB_FRAGMENT_END 0x02 1432 #define HCI_CLB_FRAGMENT_SINGLE 0x03 1433 1434 /* AMP Controller Status codes 1435 */ 1436 #define HCI_AMP_CTRLR_PHYSICALLY_DOWN 0 1437 #define HCI_AMP_CTRLR_USABLE_BY_BT 1 1438 #define HCI_AMP_CTRLR_UNUSABLE_FOR_BT 2 1439 #define HCI_AMP_CTRLR_LOW_CAP_FOR_BT 3 1440 #define HCI_AMP_CTRLR_MED_CAP_FOR_BT 4 1441 #define HCI_AMP_CTRLR_HIGH_CAP_FOR_BT 5 1442 #define HCI_AMP_CTRLR_FULL_CAP_FOR_BT 6 1443 1444 #define HCI_MAX_AMP_STATUS_TYPES 7 1445 1446 1447 /* Define the extended flow specification fields used by AMP */ 1448 typedef struct { 1449 UINT8 id; 1450 UINT8 stype; 1451 UINT16 max_sdu_size; 1452 UINT32 sdu_inter_time; 1453 UINT32 access_latency; 1454 UINT32 flush_timeout; 1455 } tHCI_EXT_FLOW_SPEC; 1456 1457 1458 /* HCI message type definitions (for H4 messages) */ 1459 #define HCIT_TYPE_COMMAND 1 1460 #define HCIT_TYPE_ACL_DATA 2 1461 #define HCIT_TYPE_SCO_DATA 3 1462 #define HCIT_TYPE_EVENT 4 1463 #define HCIT_TYPE_LM_DIAG 7 1464 #define HCIT_TYPE_NFC 16 1465 1466 #define HCIT_LM_DIAG_LENGTH 63 1467 1468 /* Parameter information for HCI_BRCM_SET_ACL_PRIORITY */ 1469 #define HCI_BRCM_ACL_PRIORITY_PARAM_SIZE 3 1470 #define HCI_BRCM_ACL_PRIORITY_LOW 0x00 1471 #define HCI_BRCM_ACL_PRIORITY_HIGH 0xFF 1472 #define HCI_BRCM_SET_ACL_PRIORITY (0x0057 | HCI_GRP_VENDOR_SPECIFIC) 1473 1474 /* Define values for LMP Test Control parameters 1475 ** Test Scenario, Hopping Mode, Power Control Mode 1476 */ 1477 #define LMP_TESTCTL_TESTSC_PAUSE 0 1478 #define LMP_TESTCTL_TESTSC_TXTEST_0 1 1479 #define LMP_TESTCTL_TESTSC_TXTEST_1 2 1480 #define LMP_TESTCTL_TESTSC_TXTEST_1010 3 1481 #define LMP_TESTCTL_TESTSC_PSRND_BITSEQ 4 1482 #define LMP_TESTCTL_TESTSC_CLOSEDLB_ACL 5 1483 #define LMP_TESTCTL_TESTSC_CLOSEDLB_SCO 6 1484 #define LMP_TESTCTL_TESTSC_ACL_NOWHIT 7 1485 #define LMP_TESTCTL_TESTSC_SCO_NOWHIT 8 1486 #define LMP_TESTCTL_TESTSC_TXTEST_11110000 9 1487 #define LMP_TESTCTL_TESTSC_EXITTESTMODE 255 1488 1489 #define LMP_TESTCTL_HOPMOD_RXTX1FREQ 0 1490 #define LMP_TESTCTL_HOPMOD_HOP_EURUSA 1 1491 #define LMP_TESTCTL_HOPMOD_HOP_JAPAN 2 1492 #define LMP_TESTCTL_HOPMOD_HOP_FRANCE 3 1493 #define LMP_TESTCTL_HOPMOD_HOP_SPAIN 4 1494 #define LMP_TESTCTL_HOPMOD_REDUCED_HOP 5 1495 1496 #define LMP_TESTCTL_POWCTL_FIXEDTX_OP 0 1497 #define LMP_TESTCTL_POWCTL_ADAPTIVE 1 1498 1499 // TODO(zachoverflow): remove this once broadcom specific hacks are removed 1500 #define LMP_COMPID_BROADCOM 15 1501 1502 /* 1503 ** Define the packet types in the packet header, and a couple extra 1504 */ 1505 #define PKT_TYPE_NULL 0x00 1506 #define PKT_TYPE_POLL 0x01 1507 #define PKT_TYPE_FHS 0x02 1508 #define PKT_TYPE_DM1 0x03 1509 1510 #define PKT_TYPE_DH1 0x04 1511 #define PKT_TYPE_HV1 0x05 1512 #define PKT_TYPE_HV2 0x06 1513 #define PKT_TYPE_HV3 0x07 1514 #define PKT_TYPE_DV 0x08 1515 #define PKT_TYPE_AUX1 0x09 1516 1517 #define PKT_TYPE_DM3 0x0a 1518 #define PKT_TYPE_DH3 0x0b 1519 1520 #define PKT_TYPE_DM5 0x0e 1521 #define PKT_TYPE_DH5 0x0f 1522 1523 1524 #define PKT_TYPE_ID 0x10 /* Internally used packet types */ 1525 #define PKT_TYPE_BAD 0x11 1526 #define PKT_TYPE_NONE 0x12 1527 1528 /* 1529 ** Define packet size 1530 */ 1531 #define HCI_DM1_PACKET_SIZE 17 1532 #define HCI_DH1_PACKET_SIZE 27 1533 #define HCI_DM3_PACKET_SIZE 121 1534 #define HCI_DH3_PACKET_SIZE 183 1535 #define HCI_DM5_PACKET_SIZE 224 1536 #define HCI_DH5_PACKET_SIZE 339 1537 #define HCI_AUX1_PACKET_SIZE 29 1538 #define HCI_HV1_PACKET_SIZE 10 1539 #define HCI_HV2_PACKET_SIZE 20 1540 #define HCI_HV3_PACKET_SIZE 30 1541 #define HCI_DV_PACKET_SIZE 9 1542 #define HCI_EDR2_DH1_PACKET_SIZE 54 1543 #define HCI_EDR2_DH3_PACKET_SIZE 367 1544 #define HCI_EDR2_DH5_PACKET_SIZE 679 1545 #define HCI_EDR3_DH1_PACKET_SIZE 83 1546 #define HCI_EDR3_DH3_PACKET_SIZE 552 1547 #define HCI_EDR3_DH5_PACKET_SIZE 1021 1548 1549 /* Feature Pages */ 1550 #define HCI_EXT_FEATURES_PAGE_0 0 /* Extended Feature Page 0 (regular features) */ 1551 #define HCI_EXT_FEATURES_PAGE_1 1 /* Extended Feature Page 1 */ 1552 #define HCI_EXT_FEATURES_PAGE_2 2 /* Extended Feature Page 2 */ 1553 #define HCI_EXT_FEATURES_PAGE_MAX HCI_EXT_FEATURES_PAGE_2 1554 1555 #define HCI_FEATURE_BYTES_PER_PAGE 8 1556 1557 #define HCI_FEATURES_KNOWN(x) ((x[0] | x[1] | x[2] | x[3] | x[4] | x[5] | x[6] | x[7]) != 0) 1558 1559 /* 1560 ** LMP features encoding - page 0 1561 */ 1562 #define HCI_FEATURE_3_SLOT_PACKETS_MASK 0x01 1563 #define HCI_FEATURE_3_SLOT_PACKETS_OFF 0 1564 #define HCI_3_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_PACKETS_OFF] & HCI_FEATURE_3_SLOT_PACKETS_MASK) 1565 1566 #define HCI_FEATURE_5_SLOT_PACKETS_MASK 0x02 1567 #define HCI_FEATURE_5_SLOT_PACKETS_OFF 0 1568 #define HCI_5_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_PACKETS_OFF] & HCI_FEATURE_5_SLOT_PACKETS_MASK) 1569 1570 #define HCI_FEATURE_ENCRYPTION_MASK 0x04 1571 #define HCI_FEATURE_ENCRYPTION_OFF 0 1572 #define HCI_ENCRYPTION_SUPPORTED(x) ((x)[HCI_FEATURE_ENCRYPTION_OFF] & HCI_FEATURE_ENCRYPTION_MASK) 1573 1574 #define HCI_FEATURE_SLOT_OFFSET_MASK 0x08 1575 #define HCI_FEATURE_SLOT_OFFSET_OFF 0 1576 #define HCI_SLOT_OFFSET_SUPPORTED(x) ((x)[HCI_FEATURE_SLOT_OFFSET_OFF] & HCI_FEATURE_SLOT_OFFSET_MASK) 1577 1578 #define HCI_FEATURE_TIMING_ACC_MASK 0x10 1579 #define HCI_FEATURE_TIMING_ACC_OFF 0 1580 #define HCI_TIMING_ACC_SUPPORTED(x) ((x)[HCI_FEATURE_TIMING_ACC_OFF] & HCI_FEATURE_TIMING_ACC_MASK) 1581 1582 #define HCI_FEATURE_SWITCH_MASK 0x20 1583 #define HCI_FEATURE_SWITCH_OFF 0 1584 #define HCI_SWITCH_SUPPORTED(x) ((x)[HCI_FEATURE_SWITCH_OFF] & HCI_FEATURE_SWITCH_MASK) 1585 1586 #define HCI_FEATURE_HOLD_MODE_MASK 0x40 1587 #define HCI_FEATURE_HOLD_MODE_OFF 0 1588 #define HCI_HOLD_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_HOLD_MODE_OFF] & HCI_FEATURE_HOLD_MODE_MASK) 1589 1590 #define HCI_FEATURE_SNIFF_MODE_MASK 0x80 1591 #define HCI_FEATURE_SNIFF_MODE_OFF 0 1592 #define HCI_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_MODE_OFF] & HCI_FEATURE_SNIFF_MODE_MASK) 1593 1594 #define HCI_FEATURE_PARK_MODE_MASK 0x01 1595 #define HCI_FEATURE_PARK_MODE_OFF 1 1596 #define HCI_PARK_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_PARK_MODE_OFF] & HCI_FEATURE_PARK_MODE_MASK) 1597 1598 #define HCI_FEATURE_RSSI_MASK 0x02 1599 #define HCI_FEATURE_RSSI_OFF 1 1600 #define HCI_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_RSSI_OFF] & HCI_FEATURE_RSSI_MASK) 1601 1602 #define HCI_FEATURE_CQM_DATA_RATE_MASK 0x04 1603 #define HCI_FEATURE_CQM_DATA_RATE_OFF 1 1604 #define HCI_CQM_DATA_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_CQM_DATA_RATE_OFF] & HCI_FEATURE_CQM_DATA_RATE_MASK) 1605 1606 #define HCI_FEATURE_SCO_LINK_MASK 0x08 1607 #define HCI_FEATURE_SCO_LINK_OFF 1 1608 #define HCI_SCO_LINK_SUPPORTED(x) ((x)[HCI_FEATURE_SCO_LINK_OFF] & HCI_FEATURE_SCO_LINK_MASK) 1609 1610 #define HCI_FEATURE_HV2_PACKETS_MASK 0x10 1611 #define HCI_FEATURE_HV2_PACKETS_OFF 1 1612 #define HCI_HV2_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV2_PACKETS_OFF] & HCI_FEATURE_HV2_PACKETS_MASK) 1613 1614 #define HCI_FEATURE_HV3_PACKETS_MASK 0x20 1615 #define HCI_FEATURE_HV3_PACKETS_OFF 1 1616 #define HCI_HV3_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV3_PACKETS_OFF] & HCI_FEATURE_HV3_PACKETS_MASK) 1617 1618 #define HCI_FEATURE_U_LAW_MASK 0x40 1619 #define HCI_FEATURE_U_LAW_OFF 1 1620 #define HCI_LMP_U_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_U_LAW_OFF] & HCI_FEATURE_U_LAW_MASK) 1621 1622 #define HCI_FEATURE_A_LAW_MASK 0x80 1623 #define HCI_FEATURE_A_LAW_OFF 1 1624 #define HCI_LMP_A_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_A_LAW_OFF] & HCI_FEATURE_A_LAW_MASK) 1625 1626 #define HCI_FEATURE_CVSD_MASK 0x01 1627 #define HCI_FEATURE_CVSD_OFF 2 1628 #define HCI_LMP_CVSD_SUPPORTED(x) ((x)[HCI_FEATURE_CVSD_OFF] & HCI_FEATURE_CVSD_MASK) 1629 1630 #define HCI_FEATURE_PAGING_SCHEME_MASK 0x02 1631 #define HCI_FEATURE_PAGING_SCHEME_OFF 2 1632 #define HCI_PAGING_SCHEME_SUPPORTED(x) ((x)[HCI_FEATURE_PAGING_SCHEME_OFF] & HCI_FEATURE_PAGING_SCHEME_MASK) 1633 1634 #define HCI_FEATURE_POWER_CTRL_MASK 0x04 1635 #define HCI_FEATURE_POWER_CTRL_OFF 2 1636 #define HCI_POWER_CTRL_SUPPORTED(x) ((x)[HCI_FEATURE_POWER_CTRL_OFF] & HCI_FEATURE_POWER_CTRL_MASK) 1637 1638 #define HCI_FEATURE_TRANSPNT_MASK 0x08 1639 #define HCI_FEATURE_TRANSPNT_OFF 2 1640 #define HCI_LMP_TRANSPNT_SUPPORTED(x) ((x)[HCI_FEATURE_TRANSPNT_OFF] & HCI_FEATURE_TRANSPNT_MASK) 1641 1642 #define HCI_FEATURE_FLOW_CTRL_LAG_MASK 0x70 1643 #define HCI_FEATURE_FLOW_CTRL_LAG_OFF 2 1644 #define HCI_FLOW_CTRL_LAG_VALUE(x) (((x)[HCI_FEATURE_FLOW_CTRL_LAG_OFF] & HCI_FEATURE_FLOW_CTRL_LAG_MASK) >> 4) 1645 1646 #define HCI_FEATURE_BROADCAST_ENC_MASK 0x80 1647 #define HCI_FEATURE_BROADCAST_ENC_OFF 2 1648 #define HCI_LMP_BCAST_ENC_SUPPORTED(x) ((x)[HCI_FEATURE_BROADCAST_ENC_OFF] & HCI_FEATURE_BROADCAST_ENC_MASK) 1649 1650 #define HCI_FEATURE_SCATTER_MODE_MASK 0x01 1651 #define HCI_FEATURE_SCATTER_MODE_OFF 3 1652 #define HCI_LMP_SCATTER_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SCATTER_MODE_OFF] & HCI_FEATURE_SCATTER_MODE_MASK) 1653 1654 #define HCI_FEATURE_EDR_ACL_2MPS_MASK 0x02 1655 #define HCI_FEATURE_EDR_ACL_2MPS_OFF 3 1656 #define HCI_EDR_ACL_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_2MPS_OFF] & HCI_FEATURE_EDR_ACL_2MPS_MASK) 1657 1658 #define HCI_FEATURE_EDR_ACL_3MPS_MASK 0x04 1659 #define HCI_FEATURE_EDR_ACL_3MPS_OFF 3 1660 #define HCI_EDR_ACL_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_3MPS_OFF] & HCI_FEATURE_EDR_ACL_3MPS_MASK) 1661 1662 #define HCI_FEATURE_ENHANCED_INQ_MASK 0x08 1663 #define HCI_FEATURE_ENHANCED_INQ_OFF 3 1664 #define HCI_ENHANCED_INQ_SUPPORTED(x) ((x)[HCI_FEATURE_ENHANCED_INQ_OFF] & HCI_FEATURE_ENHANCED_INQ_MASK) 1665 1666 #define HCI_FEATURE_INTERLACED_INQ_SCAN_MASK 0x10 1667 #define HCI_FEATURE_INTERLACED_INQ_SCAN_OFF 3 1668 #define HCI_LMP_INTERLACED_INQ_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_INQ_SCAN_OFF] & HCI_FEATURE_INTERLACED_INQ_SCAN_MASK) 1669 1670 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK 0x20 1671 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF 3 1672 #define HCI_LMP_INTERLACED_PAGE_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF] & HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK) 1673 1674 #define HCI_FEATURE_INQ_RSSI_MASK 0x40 1675 #define HCI_FEATURE_INQ_RSSI_OFF 3 1676 #define HCI_LMP_INQ_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RSSI_OFF] & HCI_FEATURE_INQ_RSSI_MASK) 1677 1678 #define HCI_FEATURE_ESCO_EV3_MASK 0x80 1679 #define HCI_FEATURE_ESCO_EV3_OFF 3 1680 #define HCI_ESCO_EV3_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV3_OFF] & HCI_FEATURE_ESCO_EV3_MASK) 1681 1682 #define HCI_FEATURE_ESCO_EV4_MASK 0x01 1683 #define HCI_FEATURE_ESCO_EV4_OFF 4 1684 #define HCI_ESCO_EV4_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV4_OFF] & HCI_FEATURE_ESCO_EV4_MASK) 1685 1686 #define HCI_FEATURE_ESCO_EV5_MASK 0x02 1687 #define HCI_FEATURE_ESCO_EV5_OFF 4 1688 #define HCI_ESCO_EV5_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV5_OFF] & HCI_FEATURE_ESCO_EV5_MASK) 1689 1690 #define HCI_FEATURE_ABSENCE_MASKS_MASK 0x04 1691 #define HCI_FEATURE_ABSENCE_MASKS_OFF 4 1692 #define HCI_LMP_ABSENCE_MASKS_SUPPORTED(x) ((x)[HCI_FEATURE_ABSENCE_MASKS_OFF] & HCI_FEATURE_ABSENCE_MASKS_MASK) 1693 1694 #define HCI_FEATURE_AFH_CAP_SLAVE_MASK 0x08 1695 #define HCI_FEATURE_AFH_CAP_SLAVE_OFF 4 1696 #define HCI_LMP_AFH_CAP_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_SLAVE_OFF] & HCI_FEATURE_AFH_CAP_SLAVE_MASK) 1697 1698 #define HCI_FEATURE_AFH_CLASS_SLAVE_MASK 0x10 1699 #define HCI_FEATURE_AFH_CLASS_SLAVE_OFF 4 1700 #define HCI_LMP_AFH_CLASS_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_SLAVE_OFF] & HCI_FEATURE_AFH_CLASS_SLAVE_MASK) 1701 1702 #if 1 1703 #define HCI_FEATURE_BREDR_NOT_SPT_MASK 0x20 1704 #define HCI_FEATURE_BREDR_NOT_SPT_OFF 4 1705 #define HCI_BREDR_NOT_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_BREDR_NOT_SPT_OFF] & HCI_FEATURE_BREDR_NOT_SPT_MASK) 1706 1707 #define HCI_FEATURE_LE_SPT_MASK 0x40 1708 #define HCI_FEATURE_LE_SPT_OFF 4 1709 #define HCI_LE_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_LE_SPT_OFF] & HCI_FEATURE_LE_SPT_MASK) 1710 #else 1711 1712 #define HCI_FEATURE_ALIAS_AUTH_MASK 0x20 1713 #define HCI_FEATURE_ALIAS_AUTH_OFF 4 1714 #define HCI_LMP_ALIAS_AUTH_SUPPORTED(x) ((x)[HCI_FEATURE_ALIAS_AUTH_OFF] & HCI_FEATURE_ALIAS_AUTH_MASK) 1715 1716 #define HCI_FEATURE_ANON_MODE_MASK 0x40 1717 #define HCI_FEATURE_ANON_MODE_OFF 4 1718 #define HCI_LMP_ANON_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_ANON_MODE_OFF] & HCI_FEATURE_ANON_MODE_MASK) 1719 #endif 1720 1721 #define HCI_FEATURE_3_SLOT_EDR_ACL_MASK 0x80 1722 #define HCI_FEATURE_3_SLOT_EDR_ACL_OFF 4 1723 #define HCI_3_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ACL_OFF] & HCI_FEATURE_3_SLOT_EDR_ACL_MASK) 1724 1725 #define HCI_FEATURE_5_SLOT_EDR_ACL_MASK 0x01 1726 #define HCI_FEATURE_5_SLOT_EDR_ACL_OFF 5 1727 #define HCI_5_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_EDR_ACL_OFF] & HCI_FEATURE_5_SLOT_EDR_ACL_MASK) 1728 1729 #define HCI_FEATURE_SNIFF_SUB_RATE_MASK 0x02 1730 #define HCI_FEATURE_SNIFF_SUB_RATE_OFF 5 1731 #define HCI_SNIFF_SUB_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_SUB_RATE_OFF] & HCI_FEATURE_SNIFF_SUB_RATE_MASK) 1732 1733 #define HCI_FEATURE_ATOMIC_ENCRYPT_MASK 0x04 1734 #define HCI_FEATURE_ATOMIC_ENCRYPT_OFF 5 1735 #define HCI_ATOMIC_ENCRYPT_SUPPORTED(x) ((x)[HCI_FEATURE_ATOMIC_ENCRYPT_OFF] & HCI_FEATURE_ATOMIC_ENCRYPT_MASK) 1736 1737 #define HCI_FEATURE_AFH_CAP_MASTR_MASK 0x08 1738 #define HCI_FEATURE_AFH_CAP_MASTR_OFF 5 1739 #define HCI_LMP_AFH_CAP_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_MASTR_OFF] & HCI_FEATURE_AFH_CAP_MASTR_MASK) 1740 1741 #define HCI_FEATURE_AFH_CLASS_MASTR_MASK 0x10 1742 #define HCI_FEATURE_AFH_CLASS_MASTR_OFF 5 1743 #define HCI_LMP_AFH_CLASS_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_MASTR_OFF] & HCI_FEATURE_AFH_CLASS_MASTR_MASK) 1744 1745 #define HCI_FEATURE_EDR_ESCO_2MPS_MASK 0x20 1746 #define HCI_FEATURE_EDR_ESCO_2MPS_OFF 5 1747 #define HCI_EDR_ESCO_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_2MPS_OFF] & HCI_FEATURE_EDR_ESCO_2MPS_MASK) 1748 1749 #define HCI_FEATURE_EDR_ESCO_3MPS_MASK 0x40 1750 #define HCI_FEATURE_EDR_ESCO_3MPS_OFF 5 1751 #define HCI_EDR_ESCO_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_3MPS_OFF] & HCI_FEATURE_EDR_ESCO_3MPS_MASK) 1752 1753 #define HCI_FEATURE_3_SLOT_EDR_ESCO_MASK 0x80 1754 #define HCI_FEATURE_3_SLOT_EDR_ESCO_OFF 5 1755 #define HCI_3_SLOT_EDR_ESCO_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ESCO_OFF] & HCI_FEATURE_3_SLOT_EDR_ESCO_MASK) 1756 1757 #define HCI_FEATURE_EXT_INQ_RSP_MASK 0x01 1758 #define HCI_FEATURE_EXT_INQ_RSP_OFF 6 1759 #define HCI_EXT_INQ_RSP_SUPPORTED(x) ((x)[HCI_FEATURE_EXT_INQ_RSP_OFF] & HCI_FEATURE_EXT_INQ_RSP_MASK) 1760 1761 #if 1 /* TOKYO spec definition */ 1762 #define HCI_FEATURE_SIMUL_LE_BREDR_MASK 0x02 1763 #define HCI_FEATURE_SIMUL_LE_BREDR_OFF 6 1764 #define HCI_SIMUL_LE_BREDR_SUPPORTED(x) ((x)[HCI_FEATURE_SIMUL_LE_BREDR_OFF] & HCI_FEATURE_SIMUL_LE_BREDR_MASK) 1765 1766 #else 1767 #define HCI_FEATURE_ANUM_PIN_AWARE_MASK 0x02 1768 #define HCI_FEATURE_ANUM_PIN_AWARE_OFF 6 1769 #define HCI_ANUM_PIN_AWARE_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_AWARE_OFF] & HCI_FEATURE_ANUM_PIN_AWARE_MASK) 1770 #endif 1771 1772 #define HCI_FEATURE_ANUM_PIN_CAP_MASK 0x04 1773 #define HCI_FEATURE_ANUM_PIN_CAP_OFF 6 1774 #define HCI_ANUM_PIN_CAP_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_CAP_OFF] & HCI_FEATURE_ANUM_PIN_CAP_MASK) 1775 1776 #define HCI_FEATURE_SIMPLE_PAIRING_MASK 0x08 1777 #define HCI_FEATURE_SIMPLE_PAIRING_OFF 6 1778 #define HCI_SIMPLE_PAIRING_SUPPORTED(x) ((x)[HCI_FEATURE_SIMPLE_PAIRING_OFF] & HCI_FEATURE_SIMPLE_PAIRING_MASK) 1779 1780 #define HCI_FEATURE_ENCAP_PDU_MASK 0x10 1781 #define HCI_FEATURE_ENCAP_PDU_OFF 6 1782 #define HCI_ENCAP_PDU_SUPPORTED(x) ((x)[HCI_FEATURE_ENCAP_PDU_OFF] & HCI_FEATURE_ENCAP_PDU_MASK) 1783 1784 #define HCI_FEATURE_ERROR_DATA_MASK 0x20 1785 #define HCI_FEATURE_ERROR_DATA_OFF 6 1786 #define HCI_ERROR_DATA_SUPPORTED(x) ((x)[HCI_FEATURE_ERROR_DATA_OFF] & HCI_FEATURE_ERROR_DATA_MASK) 1787 1788 #define HCI_FEATURE_NON_FLUSHABLE_PB_MASK 0x40 1789 #define HCI_FEATURE_NON_FLUSHABLE_PB_OFF 6 1790 1791 /* This feature is causing frequent link drops when doing call switch with certain av/hfp headsets */ 1792 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) (0)//((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1793 1794 #define HCI_FEATURE_LINK_SUP_TO_EVT_MASK 0x01 1795 #define HCI_FEATURE_LINK_SUP_TO_EVT_OFF 7 1796 #define HCI_LINK_SUP_TO_EVT_SUPPORTED(x) ((x)[HCI_FEATURE_LINK_SUP_TO_EVT_OFF] & HCI_FEATURE_LINK_SUP_TO_EVT_MASK) 1797 1798 #define HCI_FEATURE_INQ_RESP_TX_MASK 0x02 1799 #define HCI_FEATURE_INQ_RESP_TX_OFF 7 1800 #define HCI_INQ_RESP_TX_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RESP_TX_OFF] & HCI_FEATURE_INQ_RESP_TX_MASK) 1801 1802 #define HCI_FEATURE_EXTENDED_MASK 0x80 1803 #define HCI_FEATURE_EXTENDED_OFF 7 1804 #define HCI_LMP_EXTENDED_SUPPORTED(x) ((x)[HCI_FEATURE_EXTENDED_OFF] & HCI_FEATURE_EXTENDED_MASK) 1805 1806 /* 1807 ** LMP features encoding - page 1 1808 */ 1809 #define HCI_EXT_FEATURE_SSP_HOST_MASK 0x01 1810 #define HCI_EXT_FEATURE_SSP_HOST_OFF 0 1811 #define HCI_SSP_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SSP_HOST_OFF] & HCI_EXT_FEATURE_SSP_HOST_MASK) 1812 1813 #define HCI_EXT_FEATURE_LE_HOST_MASK 0x02 1814 #define HCI_EXT_FEATURE_LE_HOST_OFF 0 1815 #define HCI_LE_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_LE_HOST_OFF] & HCI_EXT_FEATURE_LE_HOST_MASK) 1816 1817 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK 0x04 1818 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF 0 1819 #define HCI_SIMUL_DUMO_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF] & HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK) 1820 1821 #define HCI_EXT_FEATURE_SC_HOST_MASK 0x08 1822 #define HCI_EXT_FEATURE_SC_HOST_OFF 0 1823 #define HCI_SC_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_HOST_OFF] & HCI_EXT_FEATURE_SC_HOST_MASK) 1824 1825 /* 1826 ** LMP features encoding - page 2 1827 */ 1828 #define HCI_EXT_FEATURE_CSB_MASTER_MASK 0x01 1829 #define HCI_EXT_FEATURE_CSB_MASTER_OFF 0 1830 #define HCI_CSB_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_MASTER_OFF] & HCI_EXT_FEATURE_CSB_MASTER_MASK) 1831 1832 #define HCI_EXT_FEATURE_CSB_SLAVE_MASK 0x02 1833 #define HCI_EXT_FEATURE_CSB_SLAVE_OFF 0 1834 #define HCI_CSB_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_SLAVE_OFF] & HCI_EXT_FEATURE_CSB_SLAVE_MASK) 1835 1836 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK 0x04 1837 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF 0 1838 #define HCI_SYNC_TRAIN_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF] & HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK) 1839 1840 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK 0x08 1841 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF 0 1842 #define HCI_SYNC_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF] & HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK) 1843 1844 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK 0x10 1845 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF 0 1846 #define HCI_INQ_RESP_NOTIF_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF] & HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK) 1847 1848 #define HCI_EXT_FEATURE_SC_CTRLR_MASK 0x01 1849 #define HCI_EXT_FEATURE_SC_CTRLR_OFF 1 1850 #define HCI_SC_CTRLR_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_CTRLR_OFF] & HCI_EXT_FEATURE_SC_CTRLR_MASK) 1851 1852 #define HCI_EXT_FEATURE_PING_MASK 0x02 1853 #define HCI_EXT_FEATURE_PING_OFF 1 1854 #define HCI_PING_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_PING_OFF] & HCI_EXT_FEATURE_PING_MASK) 1855 1856 /* 1857 ** LE features encoding - page 0 (the only page for now) 1858 */ 1859 /* LE Encryption */ 1860 #define HCI_LE_FEATURE_LE_ENCRYPTION_MASK 0x01 1861 #define HCI_LE_FEATURE_LE_ENCRYPTION_OFF 0 1862 #define HCI_LE_ENCRYPTION_SUPPORTED(x) ((x)[HCI_LE_FEATURE_LE_ENCRYPTION_OFF] & HCI_LE_FEATURE_LE_ENCRYPTION_MASK) 1863 1864 /* Connection Parameters Request Procedure */ 1865 #define HCI_LE_FEATURE_CONN_PARAM_REQ_MASK 0x02 1866 #define HCI_LE_FEATURE_CONN_PARAM_REQ_OFF 0 1867 #define HCI_LE_CONN_PARAM_REQ_SUPPORTED(x) ((x)[HCI_LE_FEATURE_CONN_PARAM_REQ_OFF] & HCI_LE_FEATURE_CONN_PARAM_REQ_MASK) 1868 1869 /* Extended Reject Indication */ 1870 #define HCI_LE_FEATURE_EXT_REJ_IND_MASK 0x04 1871 #define HCI_LE_FEATURE_EXT_REJ_IND_OFF 0 1872 #define HCI_LE_EXT_REJ_IND_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_REJ_IND_OFF] & HCI_LE_FEATURE_EXT_REJ_IND_MASK) 1873 1874 /* Slave-initiated Features Exchange */ 1875 #define HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_MASK 0x08 1876 #define HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_OFF 0 1877 #define HCI_LE_SLAVE_INIT_FEAT_EXC_SUPPORTED(x) ((x)[HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_OFF] & HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_MASK) 1878 1879 /* Enhanced privacy Feature: bit 6 */ 1880 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_MASK 0x40 1881 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_OFF 0 1882 #define HCI_LE_ENHANCED_PRIVACY_SUPPORTED(x) ((x)[HCI_LE_FEATURE_ENHANCED_PRIVACY_OFF] & HCI_LE_FEATURE_ENHANCED_PRIVACY_MASK) 1883 1884 /* Extended scanner filter policy : 7 */ 1885 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_MASK 0x80 1886 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_OFF 0 1887 #define HCI_LE_EXT_SCAN_FILTER_POLICY_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_OFF] & HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_MASK) 1888 1889 /* Slave-initiated Features Exchange */ 1890 #define HCI_LE_FEATURE_DATA_LEN_EXT_MASK 0x20 1891 #define HCI_LE_FEATURE_DATA_LEN_EXT_OFF 0 1892 #define HCI_LE_DATA_LEN_EXT_SUPPORTED(x) ((x)[HCI_LE_FEATURE_DATA_LEN_EXT_OFF] & HCI_LE_FEATURE_DATA_LEN_EXT_MASK) 1893 1894 /* 1895 ** Local Supported Commands encoding 1896 */ 1897 #define HCI_NUM_SUPP_COMMANDS_BYTES 64 1898 1899 /* Supported Commands Byte 0 */ 1900 #define HCI_SUPP_COMMANDS_INQUIRY_MASK 0x01 1901 #define HCI_SUPP_COMMANDS_INQUIRY_OFF 0 1902 #define HCI_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_OFF] & HCI_SUPP_COMMANDS_INQUIRY_MASK) 1903 1904 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK 0x02 1905 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF 0 1906 #define HCI_INQUIRY_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF] & HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK) 1907 1908 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK 0x04 1909 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF 0 1910 #define HCI_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK) 1911 1912 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK 0x08 1913 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF 0 1914 #define HCI_EXIT_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK) 1915 1916 #define HCI_SUPP_COMMANDS_CREATE_CONN_MASK 0x10 1917 #define HCI_SUPP_COMMANDS_CREATE_CONN_OFF 0 1918 #define HCI_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CREATE_CONN_MASK) 1919 1920 #define HCI_SUPP_COMMANDS_DISCONNECT_MASK 0x20 1921 #define HCI_SUPP_COMMANDS_DISCONNECT_OFF 0 1922 #define HCI_DISCONNECT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_MASK) 1923 1924 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK 0x40 1925 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF 0 1926 #define HCI_ADD_SCO_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF] & HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK) 1927 1928 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK 0x80 1929 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF 0 1930 #define HCI_CANCEL_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK) 1931 1932 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK 0x01 1933 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF 1 1934 #define HCI_ACCEPT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK) 1935 1936 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK 0x02 1937 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF 1 1938 #define HCI_REJECT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK) 1939 1940 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK 0x04 1941 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF 1 1942 #define HCI_LINK_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK) 1943 1944 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK 0x08 1945 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF 1 1946 #define HCI_LINK_KEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK) 1947 1948 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK 0x10 1949 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF 1 1950 #define HCI_PIN_CODE_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK) 1951 1952 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK 0x20 1953 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF 1 1954 #define HCI_PIN_CODE_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK) 1955 1956 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK 0x40 1957 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF 1 1958 #define HCI_CHANGE_CONN_PKT_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK) 1959 1960 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK 0x80 1961 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF 1 1962 #define HCI_AUTH_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF] & HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK) 1963 1964 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK 0x01 1965 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF 2 1966 #define HCI_SET_CONN_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK) 1967 1968 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK 0x02 1969 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF 2 1970 #define HCI_CHANGE_CONN_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK) 1971 1972 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK 0x04 1973 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF 2 1974 #define HCI_MASTER_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK) 1975 1976 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK 0x08 1977 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF 2 1978 #define HCI_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK) 1979 1980 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK 0x10 1981 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF 2 1982 #define HCI_CANCEL_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK) 1983 1984 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK 0x20 1985 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF 2 1986 #define HCI_READ_REMOTE_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK) 1987 1988 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK 0x40 1989 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF 2 1990 #define HCI_READ_REMOTE_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK) 1991 1992 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK 0x80 1993 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF 2 1994 #define HCI_READ_REMOTE_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK) 1995 1996 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK 0x01 1997 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF 3 1998 #define HCI_READ_CLOCK_OFFSET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF] & HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK) 1999 2000 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK 0x02 2001 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF 3 2002 #define HCI_READ_LMP_HANDLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF] & HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK) 2003 2004 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK 0x02 2005 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF 4 2006 #define HCI_HOLD_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK) 2007 2008 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK 0x04 2009 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF 4 2010 #define HCI_SNIFF_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK) 2011 2012 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK 0x08 2013 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF 4 2014 #define HCI_EXIT_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF] & HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK) 2015 2016 #define HCI_SUPP_COMMANDS_PARK_STATE_MASK 0x10 2017 #define HCI_SUPP_COMMANDS_PARK_STATE_OFF 4 2018 #define HCI_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_PARK_STATE_MASK) 2019 2020 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK 0x20 2021 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF 4 2022 #define HCI_EXIT_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK) 2023 2024 #define HCI_SUPP_COMMANDS_QOS_SETUP_MASK 0x40 2025 #define HCI_SUPP_COMMANDS_QOS_SETUP_OFF 4 2026 #define HCI_QOS_SETUP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_QOS_SETUP_OFF] & HCI_SUPP_COMMANDS_QOS_SETUP_MASK) 2027 2028 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK 0x80 2029 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF 4 2030 #define HCI_ROLE_DISCOVERY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF] & HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK) 2031 2032 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK 0x01 2033 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF 5 2034 #define HCI_SWITCH_ROLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF] & HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK) 2035 2036 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK 0x02 2037 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF 5 2038 #define HCI_READ_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK) 2039 2040 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK 0x04 2041 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF 5 2042 #define HCI_WRITE_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK) 2043 2044 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK 0x08 2045 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF 5 2046 #define HCI_READ_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK) 2047 2048 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK 0x10 2049 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF 5 2050 #define HCI_WRITE_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK) 2051 2052 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK 0x20 2053 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF 5 2054 #define HCI_FLOW_SPECIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF] & HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK) 2055 2056 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK 0x40 2057 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF 5 2058 #define HCI_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK) 2059 2060 #define HCI_SUPP_COMMANDS_RESET_MASK 0x80 2061 #define HCI_SUPP_COMMANDS_RESET_OFF 5 2062 #define HCI_RESET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_OFF] & HCI_SUPP_COMMANDS_RESET_MASK) 2063 2064 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK 0x01 2065 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF 6 2066 #define HCI_SET_EVENT_FILTER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK) 2067 2068 #define HCI_SUPP_COMMANDS_FLUSH_MASK 0x02 2069 #define HCI_SUPP_COMMANDS_FLUSH_OFF 6 2070 #define HCI_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLUSH_OFF] & HCI_SUPP_COMMANDS_FLUSH_MASK) 2071 2072 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK 0x04 2073 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF 6 2074 #define HCI_READ_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK) 2075 2076 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK 0x08 2077 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF 6 2078 #define HCI_WRITE_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK) 2079 2080 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK 0x10 2081 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF 6 2082 #define HCI_CREATE_NEW_UNIT_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF] & HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK) 2083 2084 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK 0x20 2085 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF 6 2086 #define HCI_READ_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK) 2087 2088 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK 0x40 2089 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF 6 2090 #define HCI_WRITE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK) 2091 2092 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK 0x80 2093 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF 6 2094 #define HCI_DELETE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK) 2095 2096 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK 0x01 2097 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF 7 2098 #define HCI_WRITE_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK) 2099 2100 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK 0x02 2101 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF 7 2102 #define HCI_READ_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK) 2103 2104 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK 0x04 2105 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF 7 2106 #define HCI_READ_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK) 2107 2108 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK 0x08 2109 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF 7 2110 #define HCI_WRITE_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK) 2111 2112 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK 0x10 2113 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF 7 2114 #define HCI_READ_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK) 2115 2116 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK 0x20 2117 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF 7 2118 #define HCI_WRITE_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK) 2119 2120 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK 0x40 2121 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF 7 2122 #define HCI_READ_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK) 2123 2124 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK 0x80 2125 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF 7 2126 #define HCI_WRITE_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK) 2127 2128 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK 0x01 2129 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF 8 2130 #define HCI_READ_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK) 2131 2132 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK 0x02 2133 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF 8 2134 #define HCI_WRITE_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK) 2135 2136 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK 0x04 2137 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF 8 2138 #define HCI_READ_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK) 2139 2140 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK 0x08 2141 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF 8 2142 #define HCI_WRITE_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK) 2143 2144 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK 0x10 2145 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF 8 2146 #define HCI_READ_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK) 2147 2148 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK 0x20 2149 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF 8 2150 #define HCI_WRITE_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK) 2151 2152 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK 0x40 2153 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF 8 2154 #define HCI_READ_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK) 2155 2156 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK 0x80 2157 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF 8 2158 #define HCI_WRITE_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK) 2159 2160 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK 0x01 2161 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF 9 2162 #define HCI_READ_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK) 2163 2164 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK 0x02 2165 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF 9 2166 #define HCI_WRITE_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK) 2167 2168 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK 0x04 2169 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF 9 2170 #define HCI_READ_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK) 2171 2172 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK 0x08 2173 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF 9 2174 #define HCI_WRITE_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK) 2175 2176 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK 0x10 2177 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF 9 2178 #define HCI_READ_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK) 2179 2180 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK 0x20 2181 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF 9 2182 #define HCI_WRITE_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK) 2183 2184 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK 0x40 2185 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF 9 2186 #define HCI_READ_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK) 2187 2188 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK 0x80 2189 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF 9 2190 #define HCI_WRITE_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK) 2191 2192 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK 0x01 2193 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF 10 2194 #define HCI_READ_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK) 2195 2196 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK 0x02 2197 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF 10 2198 #define HCI_WRITE_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK) 2199 2200 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK 0x04 2201 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF 10 2202 #define HCI_READ_TRANS_PWR_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK) 2203 2204 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK 0x08 2205 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF 10 2206 #define HCI_READ_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK) 2207 2208 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK 0x10 2209 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF 10 2210 #define HCI_WRITE_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK) 2211 2212 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK 0x20 2213 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF 10 2214 #define HCI_SET_HOST_CTRLR_TO_HOST_FC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF] & HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK) 2215 2216 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK 0x40 2217 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF 10 2218 #define HCI_HOST_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK) 2219 2220 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK 0x80 2221 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF 10 2222 #define HCI_HOST_NUM_COMPLETED_PKTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF] & HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK) 2223 2224 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK 0x01 2225 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF 11 2226 #define HCI_READ_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK) 2227 2228 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK 0x02 2229 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF 11 2230 #define HCI_WRITE_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK) 2231 2232 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK 0x04 2233 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF 11 2234 #define HCI_READ_NUM_SUPP_IAC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF] & HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK) 2235 2236 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK 0x08 2237 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF 11 2238 #define HCI_READ_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK) 2239 2240 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK 0x10 2241 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF 11 2242 #define HCI_WRITE_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK) 2243 2244 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK 0x20 2245 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF 11 2246 #define HCI_READ_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK) 2247 2248 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK 0x40 2249 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF 11 2250 #define HCI_WRITE_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK) 2251 2252 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK 0x80 2253 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF 11 2254 #define HCI_READ_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK) 2255 2256 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK 0x01 2257 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF 12 2258 #define HCI_WRITE_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK) 2259 2260 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK 0x02 2261 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF 12 2262 #define HCI_SET_AFH_CHNL_CLASS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF] & HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK) 2263 2264 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK 0x10 2265 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF 12 2266 #define HCI_READ_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK) 2267 2268 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK 0x20 2269 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF 12 2270 #define HCI_WRITE_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK) 2271 2272 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK 0x40 2273 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF 12 2274 #define HCI_READ_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK) 2275 2276 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK 0x80 2277 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF 12 2278 #define HCI_WRITE_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK) 2279 2280 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK 0x01 2281 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF 13 2282 #define HCI_READ_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK) 2283 2284 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK 0x02 2285 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF 13 2286 #define HCI_WRITE_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK) 2287 2288 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK 0x04 2289 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF 13 2290 #define HCI_READ_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK) 2291 2292 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK 0x08 2293 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF 13 2294 #define HCI_WRITE_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK) 2295 2296 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK 0x08 2297 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF 14 2298 #define HCI_READ_LOCAL_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK) 2299 2300 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK 0x10 2301 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF 14 2302 #define HCI_READ_LOCAL_SUP_CMDS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK) 2303 2304 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK 0x20 2305 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF 14 2306 #define HCI_READ_LOCAL_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK) 2307 2308 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK 0x40 2309 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF 14 2310 #define HCI_READ_LOCAL_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK) 2311 2312 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK 0x80 2313 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF 14 2314 #define HCI_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK) 2315 2316 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK 0x01 2317 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF 15 2318 #define HCI_READ_COUNTRY_CODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF] & HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK) 2319 2320 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK 0x02 2321 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF 15 2322 #define HCI_READ_BD_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF] & HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK) 2323 2324 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK 0x04 2325 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF 15 2326 #define HCI_READ_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK) 2327 2328 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK 0x08 2329 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF 15 2330 #define HCI_RESET_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK) 2331 2332 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK 0x10 2333 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF 15 2334 #define HCI_GET_LINK_QUALITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF] & HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK) 2335 2336 #define HCI_SUPP_COMMANDS_READ_RSSI_MASK 0x20 2337 #define HCI_SUPP_COMMANDS_READ_RSSI_OFF 15 2338 #define HCI_READ_RSSI_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_RSSI_OFF] & HCI_SUPP_COMMANDS_READ_RSSI_MASK) 2339 2340 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK 0x40 2341 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF 15 2342 #define HCI_READ_AFH_CH_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK) 2343 2344 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK 0x80 2345 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF 15 2346 #define HCI_READ_BD_CLOCK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF] & HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK) 2347 2348 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK 0x01 2349 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF 16 2350 #define HCI_READ_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK) 2351 2352 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK 0x02 2353 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF 16 2354 #define HCI_WRITE_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK) 2355 2356 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK 0x04 2357 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF 16 2358 #define HCI_ENABLE_DEV_UNDER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF] & HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK) 2359 2360 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK 0x08 2361 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF 16 2362 #define HCI_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK) 2363 2364 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK 0x10 2365 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF 16 2366 #define HCI_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK) 2367 2368 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK 0x20 2369 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF 16 2370 #define HCI_REJECT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK) 2371 2372 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK 0x01 2373 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF 17 2374 #define HCI_READ_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK) 2375 2376 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK 0x02 2377 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF 17 2378 #define HCI_WRITE_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK) 2379 2380 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK 0x04 2381 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF 17 2382 #define HCI_REFRESH_ENCRYPTION_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF] & HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK) 2383 2384 /* Octet 17, bit 3 is reserved */ 2385 2386 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK 0x10 2387 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF 17 2388 #define HCI_SNIFF_SUB_RATE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF] & HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK) 2389 2390 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK 0x20 2391 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF 17 2392 #define HCI_READ_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK) 2393 2394 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK 0x40 2395 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF 17 2396 #define HCI_WRITE_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK) 2397 2398 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK 0x80 2399 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF 17 2400 #define HCI_READ_LOCAL_OOB_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK) 2401 2402 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK 0x01 2403 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF 18 2404 #define HCI_READ_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK) 2405 2406 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK 0x02 2407 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF 18 2408 #define HCI_WRITE_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK) 2409 2410 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x04 2411 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2412 #define HCI_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2413 2414 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x08 2415 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2416 #define HCI_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2417 2418 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_MASK 0x80 2419 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_OFF 18 2420 #define HCI_IO_CAPABILITY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_MASK) 2421 2422 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK 0x01 2423 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF 19 2424 #define HCI_USER_CONFIRMATION_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK) 2425 2426 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK 0x02 2427 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF 19 2428 #define HCI_USER_CONFIRMATION_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK) 2429 2430 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK 0x04 2431 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF 19 2432 #define HCI_USER_PASSKEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK) 2433 2434 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK 0x08 2435 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF 19 2436 #define HCI_USER_PASSKEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK) 2437 2438 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK 0x10 2439 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF 19 2440 #define HCI_REMOTE_OOB_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK) 2441 2442 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK 0x20 2443 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF 19 2444 #define HCI_WRITE_SIMPLE_PAIRING_DBG_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK) 2445 2446 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK 0x40 2447 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF 19 2448 #define HCI_ENHANCED_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF] & HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK) 2449 2450 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK 0x80 2451 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF 19 2452 #define HCI_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK) 2453 2454 /* Supported Commands (Byte 20) */ 2455 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK 0x04 2456 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF 20 2457 #define HCI_SEND_NOTIF_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF] & HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK) 2458 2459 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK 0x08 2460 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF 20 2461 #define HCI_IO_CAP_REQ_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK) 2462 2463 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK 0x10 2464 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF 20 2465 #define HCI_READ_ENCR_KEY_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK) 2466 2467 /* Supported Commands (Byte 21) */ 2468 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK 0x01 2469 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF 21 2470 #define HCI_CREATE_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK) 2471 2472 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK 0x02 2473 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF 21 2474 #define HCI_ACCEPT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK) 2475 2476 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK 0x04 2477 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF 21 2478 #define HCI_DISCONNECT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK) 2479 2480 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK 0x08 2481 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF 21 2482 #define HCI_CREATE_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK) 2483 2484 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK 0x10 2485 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF 21 2486 #define HCI_ACCEPT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK) 2487 2488 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK 0x20 2489 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF 21 2490 #define HCI_DISCONNECT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK) 2491 2492 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK 0x40 2493 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF 21 2494 #define HCI_LOGICAL_LINK_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF] & HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK) 2495 2496 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK 0x80 2497 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF 21 2498 #define HCI_FLOW_SPEC_MODIFY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF] & HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK) 2499 2500 /* Supported Commands (Byte 22) */ 2501 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x01 2502 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2503 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2504 2505 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x02 2506 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2507 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2508 2509 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK 0x04 2510 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF 22 2511 #define HCI_SET_EVENT_MASK_PAGE_2_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK) 2512 2513 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK 0x08 2514 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF 22 2515 #define HCI_READ_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK) 2516 2517 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK 0x10 2518 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF 22 2519 #define HCI_WRITE_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK) 2520 2521 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK 0x20 2522 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF 22 2523 #define HCI_READ_LOCAL_AMP_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK) 2524 2525 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK 0x40 2526 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF 22 2527 #define HCI_READ_LOCAL_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK) 2528 2529 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK 0x80 2530 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF 22 2531 #define HCI_WRITE_REMOTE_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK) 2532 2533 /* Supported Commands (Byte 23) */ 2534 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK 0x01 2535 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF 23 2536 #define HCI_READ_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK) 2537 2538 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK 0x02 2539 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF 23 2540 #define HCI_WRITE_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK) 2541 2542 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK 0x04 2543 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF 23 2544 #define HCI_READ_DATA_BLOCK_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK) 2545 2546 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK 0x20 2547 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF 23 2548 #define HCI_ENABLE_AMP_RCVR_REPORTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF] & HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK) 2549 2550 #define HCI_SUPP_COMMANDS_AMP_TEST_END_MASK 0x40 2551 #define HCI_SUPP_COMMANDS_AMP_TEST_END_OFF 23 2552 #define HCI_AMP_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_END_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_END_MASK) 2553 2554 #define HCI_SUPP_COMMANDS_AMP_TEST_MASK 0x80 2555 #define HCI_SUPP_COMMANDS_AMP_TEST_OFF 23 2556 #define HCI_AMP_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_MASK) 2557 2558 /* Supported Commands (Byte 24) */ 2559 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK 0x01 2560 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF 24 2561 #define HCI_READ_TRANSMIT_POWER_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK) 2562 2563 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK 0x04 2564 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF 24 2565 #define HCI_READ_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK) 2566 2567 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK 0x08 2568 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF 24 2569 #define HCI_WRITE_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK) 2570 2571 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK 0x10 2572 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF 24 2573 #define HCI_SHORT_RANGE_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF] & HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK) 2574 2575 /* LE commands TBD 2576 ** Supported Commands (Byte 24 continued) 2577 ** Supported Commands (Byte 25) 2578 ** Supported Commands (Byte 26) 2579 ** Supported Commands (Byte 27) 2580 ** Supported Commands (Byte 28) 2581 */ 2582 2583 /* Supported Commands (Byte 29) */ 2584 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK 0x08 2585 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF 29 2586 #define HCI_READ_ENH_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK) 2587 2588 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK 0x10 2589 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF 29 2590 #define HCI_READ_ENH_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK) 2591 2592 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK 0x20 2593 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF 29 2594 #define HCI_READ_LOCAL_CODECS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK) 2595 2596 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK 0x40 2597 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF 29 2598 #define HCI_SET_MWS_CHANNEL_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF] & HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK) 2599 2600 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK 0x80 2601 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF 29 2602 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF] & HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK) 2603 2604 2605 /* Supported Commands (Byte 30) */ 2606 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK 0x01 2607 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF 30 2608 #define HCI_SET_MWS_SIGNALING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK) 2609 2610 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK 0x02 2611 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF 30 2612 #define HCI_SET_MWS_TRANSPORT_LAYER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF] & HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK) 2613 2614 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK 0x04 2615 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF 30 2616 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK) 2617 2618 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK 0x08 2619 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF 30 2620 #define HCI_GET_MWS_TRANS_LAYER_CFG_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF] & HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK) 2621 2622 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK 0x10 2623 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF 30 2624 #define HCI_SET_MWS_PATTERN_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF] & HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK) 2625 2626 /* Supported Commands (Byte 30 bit 5) */ 2627 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK 0x20 2628 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF 30 2629 #define HCI_SET_TRIG_CLK_CAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF] & HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK) 2630 2631 2632 /* Supported Commands (Byte 30 bit 6-7) */ 2633 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE 0x06 2634 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF 30 2635 #define HCI_TRUNCATED_PAGE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE) 2636 2637 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL 0x07 2638 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF 30 2639 #define HCI_TRUNCATED_PAGE_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL) 2640 2641 /* Supported Commands (Byte 31 bit 6-7) */ 2642 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST 0x00 2643 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF 31 2644 #define HCI_SET_CONLESS_SLAVE_BRCST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST) 2645 2646 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE 0x01 2647 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF 31 2648 #define HCI_SET_CONLESS_SLAVE_BRCST_RECEIVE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE) 2649 2650 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN 0x02 2651 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF 31 2652 #define HCI_START_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_START_SYNC_TRAIN) 2653 2654 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN 0x03 2655 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF 31 2656 #define HCI_RECEIVE_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN) 2657 2658 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR 0x04 2659 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF 31 2660 #define HCI_SET_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR) 2661 2662 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR 0x05 2663 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF 31 2664 #define HCI_DELETE_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR) 2665 2666 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA 0x06 2667 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF 31 2668 #define HCI_SET_CONLESS_SLAVE_BRCST_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA) 2669 2670 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM 0x07 2671 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF 31 2672 #define HCI_READ_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM) 2673 2674 /* Supported Commands (Byte 32 bit 0) */ 2675 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM 0x00 2676 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF 32 2677 #define HCI_WRITE_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM) 2678 2679 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK 0x02 2680 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF 32 2681 #define HCI_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK) 2682 2683 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK 0x04 2684 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF 32 2685 #define HCI_READ_SECURE_CONNS_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK) 2686 2687 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK 0x08 2688 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF 32 2689 #define HCI_WRITE_SECURE_CONNS_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK) 2690 2691 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK 0x10 2692 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF 32 2693 #define HCI_READ_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK) 2694 2695 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK 0x20 2696 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF 32 2697 #define HCI_WRITE_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK) 2698 2699 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK 0x40 2700 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF 32 2701 #define HCI_READ_LOCAL_OOB_EXTENDED_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK) 2702 2703 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK 0x80 2704 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF 32 2705 #define HCI_WRITE_SECURE_CONNECTIONS_TEST_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK) 2706 2707 /* supported LE remote control connection parameter request reply */ 2708 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK 0x10 2709 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF 33 2710 #define HCI_LE_RC_CONN_PARAM_UPD_RPY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF] & HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK) 2711 2712 #define HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK 0x20 2713 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF 33 2714 #define HCI_LE_RC_CONN_PARAM_UPD_NEG_RPY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF] & HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK) 2715 2716 #endif 2717
