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Searched refs:DR_REG_PCNT_BASE (Results 1 – 6 of 6) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dpcnt_reg.h19 #define PCNT_U0_CONF0_REG (DR_REG_PCNT_BASE + 0x0000)
120 #define PCNT_U0_CONF1_REG (DR_REG_PCNT_BASE + 0x0004)
134 #define PCNT_U0_CONF2_REG (DR_REG_PCNT_BASE + 0x0008)
148 #define PCNT_U1_CONF0_REG (DR_REG_PCNT_BASE + 0x000c)
249 #define PCNT_U1_CONF1_REG (DR_REG_PCNT_BASE + 0x0010)
263 #define PCNT_U1_CONF2_REG (DR_REG_PCNT_BASE + 0x0014)
277 #define PCNT_U2_CONF0_REG (DR_REG_PCNT_BASE + 0x0018)
378 #define PCNT_U2_CONF1_REG (DR_REG_PCNT_BASE + 0x001c)
392 #define PCNT_U2_CONF2_REG (DR_REG_PCNT_BASE + 0x0020)
406 #define PCNT_U3_CONF0_REG (DR_REG_PCNT_BASE + 0x0024)
[all …]
Dsoc.h60 #define DR_REG_PCNT_BASE 0x3ff57000 macro
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dpcnt_reg.h27 #define PCNT_U0_CONF0_REG (DR_REG_PCNT_BASE + 0x0)
167 #define PCNT_U0_CONF1_REG (DR_REG_PCNT_BASE + 0x4)
186 #define PCNT_U0_CONF2_REG (DR_REG_PCNT_BASE + 0x8)
205 #define PCNT_U1_CONF0_REG (DR_REG_PCNT_BASE + 0xc)
345 #define PCNT_U1_CONF1_REG (DR_REG_PCNT_BASE + 0x10)
364 #define PCNT_U1_CONF2_REG (DR_REG_PCNT_BASE + 0x14)
383 #define PCNT_U2_CONF0_REG (DR_REG_PCNT_BASE + 0x18)
523 #define PCNT_U2_CONF1_REG (DR_REG_PCNT_BASE + 0x1c)
542 #define PCNT_U2_CONF2_REG (DR_REG_PCNT_BASE + 0x20)
561 #define PCNT_U3_CONF0_REG (DR_REG_PCNT_BASE + 0x24)
[all …]
Dsoc.h65 #define DR_REG_PCNT_BASE 0x3f417000 macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dpcnt_reg.h27 #define PCNT_U0_CONF0_REG (DR_REG_PCNT_BASE + 0x0)
167 #define PCNT_U0_CONF1_REG (DR_REG_PCNT_BASE + 0x4)
186 #define PCNT_U0_CONF2_REG (DR_REG_PCNT_BASE + 0x8)
205 #define PCNT_U1_CONF0_REG (DR_REG_PCNT_BASE + 0xc)
345 #define PCNT_U1_CONF1_REG (DR_REG_PCNT_BASE + 0x10)
364 #define PCNT_U1_CONF2_REG (DR_REG_PCNT_BASE + 0x14)
383 #define PCNT_U2_CONF0_REG (DR_REG_PCNT_BASE + 0x18)
523 #define PCNT_U2_CONF1_REG (DR_REG_PCNT_BASE + 0x1c)
542 #define PCNT_U2_CONF2_REG (DR_REG_PCNT_BASE + 0x20)
561 #define PCNT_U3_CONF0_REG (DR_REG_PCNT_BASE + 0x24)
[all …]
Dsoc.h59 #define DR_REG_PCNT_BASE 0x60017000 macro