DR_REG_GPIO_BASE (reference) in projects: hal_espressif-3.6.0

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Searched refs:DR_REG_GPIO_BASE (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
D	gpio_reg.h	50 #define GPIO_BT_SELECT_REG (DR_REG_GPIO_BASE + 0x0) 58 #define GPIO_OUT_REG (DR_REG_GPIO_BASE + 0x4) 66 #define GPIO_OUT_W1TS_REG (DR_REG_GPIO_BASE + 0x8) 74 #define GPIO_OUT_W1TC_REG (DR_REG_GPIO_BASE + 0xC) 82 #define GPIO_OUT1_REG (DR_REG_GPIO_BASE + 0x10) 90 #define GPIO_OUT1_W1TS_REG (DR_REG_GPIO_BASE + 0x14) 98 #define GPIO_OUT1_W1TC_REG (DR_REG_GPIO_BASE + 0x18) 106 #define GPIO_SDIO_SELECT_REG (DR_REG_GPIO_BASE + 0x1C) 114 #define GPIO_ENABLE_REG (DR_REG_GPIO_BASE + 0x20) 122 #define GPIO_ENABLE_W1TS_REG (DR_REG_GPIO_BASE + 0x24) [all …]
D	soc.h	`48 #define DR_REG_GPIO_BASE 0x3f404000 macro`
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
D	gpio_reg.h	53 #define GPIO_BT_SELECT_REG (DR_REG_GPIO_BASE + 0x0) 61 #define GPIO_OUT_REG (DR_REG_GPIO_BASE + 0x4) 69 #define GPIO_OUT_W1TS_REG (DR_REG_GPIO_BASE + 0x8) 77 #define GPIO_OUT_W1TC_REG (DR_REG_GPIO_BASE + 0xC) 85 #define GPIO_OUT1_REG (DR_REG_GPIO_BASE + 0x10) 93 #define GPIO_OUT1_W1TS_REG (DR_REG_GPIO_BASE + 0x14) 101 #define GPIO_OUT1_W1TC_REG (DR_REG_GPIO_BASE + 0x18) 109 #define GPIO_SDIO_SELECT_REG (DR_REG_GPIO_BASE + 0x1C) 117 #define GPIO_ENABLE_REG (DR_REG_GPIO_BASE + 0x20) 125 #define GPIO_ENABLE_W1TS_REG (DR_REG_GPIO_BASE + 0x24) [all …]
D	soc.h	`32 #define DR_REG_GPIO_BASE 0x60004000 macro`
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
D	gpio_reg.h	18 #define GPIO_BT_SELECT_REG (DR_REG_GPIO_BASE + 0x0000) 26 #define GPIO_OUT_REG (DR_REG_GPIO_BASE + 0x0004) 34 #define GPIO_OUT_W1TS_REG (DR_REG_GPIO_BASE + 0x0008) 42 #define GPIO_OUT_W1TC_REG (DR_REG_GPIO_BASE + 0x000c) 50 #define GPIO_OUT1_REG (DR_REG_GPIO_BASE + 0x0010) 58 #define GPIO_OUT1_W1TS_REG (DR_REG_GPIO_BASE + 0x0014) 66 #define GPIO_OUT1_W1TC_REG (DR_REG_GPIO_BASE + 0x0018) 74 #define GPIO_SDIO_SELECT_REG (DR_REG_GPIO_BASE + 0x001c) 82 #define GPIO_ENABLE_REG (DR_REG_GPIO_BASE + 0x0020) 90 #define GPIO_ENABLE_W1TS_REG (DR_REG_GPIO_BASE + 0x0024) [all …]
D	soc.h	`41 #define DR_REG_GPIO_BASE 0x3ff44000 macro`
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
D	gpio_reg.h	50 #define GPIO_BT_SELECT_REG (DR_REG_GPIO_BASE + 0x0) 58 #define GPIO_OUT_REG (DR_REG_GPIO_BASE + 0x4) 66 #define GPIO_OUT_W1TS_REG (DR_REG_GPIO_BASE + 0x8) 74 #define GPIO_OUT_W1TC_REG (DR_REG_GPIO_BASE + 0xC) 82 #define GPIO_SDIO_SELECT_REG (DR_REG_GPIO_BASE + 0x1C) 90 #define GPIO_ENABLE_REG (DR_REG_GPIO_BASE + 0x20) 98 #define GPIO_ENABLE_W1TS_REG (DR_REG_GPIO_BASE + 0x24) 106 #define GPIO_ENABLE_W1TC_REG (DR_REG_GPIO_BASE + 0x28) 114 #define GPIO_STRAP_REG (DR_REG_GPIO_BASE + 0x38) 122 #define GPIO_IN_REG (DR_REG_GPIO_BASE + 0x3C) [all …]
D	soc.h	`45 #define DR_REG_GPIO_BASE 0x60004000 macro`
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
D	gpio_reg.h	50 #define GPIO_BT_SELECT_REG (DR_REG_GPIO_BASE + 0x0) 58 #define GPIO_OUT_REG (DR_REG_GPIO_BASE + 0x4) 66 #define GPIO_OUT_W1TS_REG (DR_REG_GPIO_BASE + 0x8) 74 #define GPIO_OUT_W1TC_REG (DR_REG_GPIO_BASE + 0xC) 82 #define GPIO_OUT1_REG (DR_REG_GPIO_BASE + 0x10) 90 #define GPIO_OUT1_W1TS_REG (DR_REG_GPIO_BASE + 0x14) 98 #define GPIO_OUT1_W1TC_REG (DR_REG_GPIO_BASE + 0x18) 106 #define GPIO_SDIO_SELECT_REG (DR_REG_GPIO_BASE + 0x1C) 114 #define GPIO_ENABLE_REG (DR_REG_GPIO_BASE + 0x20) 122 #define GPIO_ENABLE_W1TS_REG (DR_REG_GPIO_BASE + 0x24) [all …]
D	soc.h	`50 #define DR_REG_GPIO_BASE 0x60004000 macro`

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TraceRecorderSource-3.4.0
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