DR_REG_APB_SARADC_BASE (reference) in projects: hal_espressif-3.6.0

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Searched refs:DR_REG_APB_SARADC_BASE (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
D	apb_saradc_reg.h	23 #define APB_SARADC_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x0) 111 #define APB_SARADC_CTRL2_REG (DR_REG_APB_SARADC_BASE + 0x4) 155 #define APB_SARADC_FILTER_CTRL1_REG (DR_REG_APB_SARADC_BASE + 0x8) 169 #define APB_SARADC_FSM_WAIT_REG (DR_REG_APB_SARADC_BASE + 0xC) 189 #define APB_SARADC_SAR1_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x10) 197 #define APB_SARADC_SAR2_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x14) 205 #define APB_SARADC_SAR1_PATT_TAB1_REG (DR_REG_APB_SARADC_BASE + 0x18) 213 #define APB_SARADC_SAR1_PATT_TAB2_REG (DR_REG_APB_SARADC_BASE + 0x1C) 221 #define APB_SARADC_SAR1_PATT_TAB3_REG (DR_REG_APB_SARADC_BASE + 0x20) 229 #define APB_SARADC_SAR1_PATT_TAB4_REG (DR_REG_APB_SARADC_BASE + 0x24) [all …]
D	soc.h	`95 #define DR_REG_APB_SARADC_BASE 0x60040000 macro`
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
D	apb_saradc_reg.h	22 #define APB_SARADC_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x000) 110 #define APB_SARADC_CTRL2_REG (DR_REG_APB_SARADC_BASE + 0x004) 154 #define APB_SARADC_FSM_REG (DR_REG_APB_SARADC_BASE + 0x008) 168 #define APB_SARADC_FSM_WAIT_REG (DR_REG_APB_SARADC_BASE + 0x00C) 188 #define APB_SARADC_SAR1_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x010) 196 #define APB_SARADC_SAR2_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x014) 204 #define APB_SARADC_SAR1_PATT_TAB1_REG (DR_REG_APB_SARADC_BASE + 0x018) 212 #define APB_SARADC_SAR1_PATT_TAB2_REG (DR_REG_APB_SARADC_BASE + 0x01C) 220 #define APB_SARADC_SAR1_PATT_TAB3_REG (DR_REG_APB_SARADC_BASE + 0x020) 228 #define APB_SARADC_SAR1_PATT_TAB4_REG (DR_REG_APB_SARADC_BASE + 0x024) [all …]
D	soc.h	`83 #define DR_REG_APB_SARADC_BASE 0x3f440000 macro`
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
D	apb_saradc_reg.h	22 #define APB_SARADC_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x000) 72 #define APB_SARADC_CTRL2_REG (DR_REG_APB_SARADC_BASE + 0x004) 110 #define APB_SARADC_FILTER_CTRL1_REG (DR_REG_APB_SARADC_BASE + 0x008) 124 #define APB_SARADC_FSM_WAIT_REG (DR_REG_APB_SARADC_BASE + 0x00C) 144 #define APB_SARADC_SAR1_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x010) 152 #define APB_SARADC_SAR2_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x014) 160 #define APB_SARADC_SAR_PATT_TAB1_REG (DR_REG_APB_SARADC_BASE + 0x018) 168 #define APB_SARADC_SAR_PATT_TAB2_REG (DR_REG_APB_SARADC_BASE + 0x01C) 176 #define APB_SARADC_ONETIME_SAMPLE_REG (DR_REG_APB_SARADC_BASE + 0x020) 214 #define APB_SARADC_APB_ADC_ARB_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x024) [all …]
D	soc.h	`92 #define DR_REG_APB_SARADC_BASE 0x60040000 macro`
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
D	apb_saradc_reg.h	22 #define APB_SARADC_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x000) 72 #define APB_SARADC_CTRL2_REG (DR_REG_APB_SARADC_BASE + 0x004) 110 #define APB_SARADC_FILTER_CTRL1_REG (DR_REG_APB_SARADC_BASE + 0x008) 124 #define APB_SARADC_FSM_WAIT_REG (DR_REG_APB_SARADC_BASE + 0x00C) 144 #define APB_SARADC_SAR1_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x010) 152 #define APB_SARADC_SAR2_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x014) 160 #define APB_SARADC_SAR_PATT_TAB1_REG (DR_REG_APB_SARADC_BASE + 0x018) 168 #define APB_SARADC_SAR_PATT_TAB2_REG (DR_REG_APB_SARADC_BASE + 0x01C) 176 #define APB_SARADC_ONETIME_SAMPLE_REG (DR_REG_APB_SARADC_BASE + 0x020) 208 #define APB_SARADC_APB_ADC_ARB_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x024) [all …]
D	soc.h	`67 #define DR_REG_APB_SARADC_BASE 0x60040000 macro`

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