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Searched refs:DPORT_PERIP_CLK_EN1_REG (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-3.6.0/components/esp_system/port/soc/esp32s2/
Dclk.c226 hwcrypto_perip_clk = ~DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN1_REG); in esp_perip_clk_init()
301 DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN1_REG, common_perip_clk1); in esp_perip_clk_init()
305 DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN1_REG, hwcrypto_perip_clk); in esp_perip_clk_init()
/hal_espressif-3.6.0/components/hal/esp32s2/include/hal/
Dclk_gate_ll.h203 return DPORT_PERIP_CLK_EN1_REG; in periph_ll_get_clk_en_reg()
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dsystem_reg.h380 #define DPORT_CPU_PERIP_CLK_EN1_REG DPORT_PERIP_CLK_EN1_REG
381 #define DPORT_PERIP_CLK_EN1_REG (DR_REG_SYSTEM_BASE + 0x044) macro