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Searched refs:DPORT_CPU_PER_CONF_REG (Results 1 – 7 of 7) sorted by relevance

/hal_espressif-3.6.0/components/esp_hw_support/port/esp32s2/
Drtc_clk.c222 SET_PERI_REG_MASK(DPORT_CPU_PER_CONF_REG, DPORT_PLL_FREQ_SEL); in rtc_clk_bbpll_configure()
233 CLEAR_PERI_REG_MASK(DPORT_CPU_PER_CONF_REG, DPORT_PLL_FREQ_SEL); in rtc_clk_bbpll_configure()
290 REG_SET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL, per_conf); in rtc_clk_cpu_freq_to_pll_mhz()
383 … uint32_t cpuperiod_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL); in rtc_clk_cpu_freq_get_config()
384 uint32_t pllfreq_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_PLL_FREQ_SEL); in rtc_clk_cpu_freq_get_config()
Drtc_init.c139 CLEAR_PERI_REG_MASK(DPORT_CPU_PER_CONF_REG, DPORT_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
141 SET_PERI_REG_MASK(DPORT_CPU_PER_CONF_REG, DPORT_CPU_WAIT_MODE_FORCE_ON); in rtc_init()
/hal_espressif-3.6.0/components/bootloader_support/src/
Dbootloader_clock_init.c37 … DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL) == DPORT_CPUPERIOD_SEL_240) { in bootloader_clock_configure()
/hal_espressif-3.6.0/components/soc/src/esp32/
Drtc_clk.c495 DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, per_conf); in rtc_clk_cpu_freq_to_pll_mhz()
651 … uint32_t cpuperiod_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL); in rtc_clk_cpu_freq_get_config()
/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/
Drtc_clk.c530 DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, per_conf); in rtc_clk_cpu_freq_to_pll_mhz()
686 … uint32_t cpuperiod_sel = DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL); in rtc_clk_cpu_freq_get_config()
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dsystem_reg.h93 #define DPORT_CPU_PER_CONF_REG (DR_REG_SYSTEM_BASE + 0x018) macro
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Ddport_reg.h163 #define DPORT_CPU_PER_CONF_REG (DR_REG_DPORT_BASE + 0x03C) macro