Home
last modified time | relevance | path

Searched refs:DPORT_APP_CACHE_CTRL1_REG (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-3.6.0/zephyr/esp32/src/boot/
Dbootloader_init.c84 DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in bootloader_reset_mmu()
86 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in bootloader_reset_mmu()
94 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0); in bootloader_reset_mmu()
/hal_espressif-3.6.0/zephyr/esp_shared/src/host_flash/
Dcache_utils.c47 ret |= DPORT_GET_PERI_REG_BITS2(DPORT_APP_CACHE_CTRL1_REG, cache_mask, 0); in spi_flash_disable_cache()
80 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL1_REG, cache_mask, saved_state, 0); in spi_flash_restore_cache()
/hal_espressif-3.6.0/components/bootloader_support/src/esp32/
Dbootloader_esp32.c117 DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in bootloader_reset_mmu()
119 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in bootloader_reset_mmu()
126 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0); in bootloader_reset_mmu()
/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/
Dcache_sram_mmu.c117 DPORT_REG_SET_FIELD(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CMMU_SRAM_PAGE_MODE, mask_s); in cache_sram_mmu_set()
Drtc_init.c37 DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CMMU_FORCE_ON); in rtc_init()
Dspiram.c140 DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DRAM1); in esp_spiram_init_cache()
Dspiram_psram.c1098 …DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DRAM1|DPORT_APP_CACHE_MA… in psram_cache_init()
1100 …DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CMMU_SRAM_PAGE_MODE, 0, DPORT_APP_CMM… in psram_cache_init()
/hal_espressif-3.6.0/components/spi_flash/
Dcache_utils.c315 ret |= DPORT_GET_PERI_REG_BITS2(DPORT_APP_CACHE_CTRL1_REG, cache_mask, 0); in spi_flash_disable_cache()
348 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL1_REG, cache_mask, saved_state, 0); in spi_flash_restore_cache()
/hal_espressif-3.6.0/components/bootloader_support/src/
Dbootloader_utility.c799 DPORT_REG_CLR_BIT( DPORT_APP_CACHE_CTRL1_REG,
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Ddport_reg.h506 #define DPORT_APP_CACHE_CTRL1_REG (DR_REG_DPORT_BASE + 0x05C) macro