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/hal_espressif-3.6.0/docs/zh_CN/api-reference/system/
Dpower_management.rst9 ESP-IDF 中集成的电源管理算法可以根据应用程序组件的需求，调整外围总线 (APB) 频率和 CPU 频率，并使芯片进入 Light-sleep 模式，尽可能减少运行应用程序的功耗。
15 - 对于从 APB 获得时钟频率的外设，其驱动可以要求在使用该外设时，将 APB 频率设置为 80 MHz。
19 请求较高的 APB 频率或 CPU 频率以及禁用 Light-sleep 模式会增加功耗，因此请将组件使用的电源管理锁降到最少。
68 - 请求将 APB 频率设置为最大值，{IDF_TARGET_NAME} 支持的最大频率为 80 MHz。
75 下表列出了启用动态调频时如何切换 CPU 频率和 APB 频率。您可以使用 :cpp:func:`esp_pm_configure` 或者 :ref:`CONFIG_{IDF_TARGET_CFG_…
99 启用动态调频后，APB 频率可在一个 RTOS 滴答周期内多次更改。有些外设不受 APB 频率变更的影响，但有些外设可能会出现问题。例如，Timer Group 外设定时器会继续计数，但定时器计数的…
101 以下外设不受 APB 频率变更的影响：
103 - **UART**：如果 REF_TICK 用作时钟源，则 UART 不受 APB 频率变更影响。请查看 :cpp:class:`uart_config_t` 中的 `use_ref_tick`。
104 - **LEDC**：如果 REF_TICK 用作时钟源，则 LEDC 不受 APB 频率变更影响。请查看 :cpp:func:`ledc_timer_config` 函数。
105 - **RMT**：如果 REF_TICK 或者 XTAL 被用作时钟源，则 RMT 不受 APB 频率变更影响。请查看 :cpp:class:`rmt_config_t` 结构体中的 `flags…
/hal_espressif-3.6.0/docs/zh_CN/api-reference/system/inc/
Dpower_management_esp32s2_and_later.rst2 | CPU 最高频率 | 电源管理锁获取情况 | APB 频率和 CPU 频率 |
6 | | | | APB: 80 MHz |
9 | | | 未获得 ``ESP_PM_CPU_FREQ_MAX`` | | APB: 80 MHz |
15 | | | | APB: 80 MHz |
18 | | | 未获得 ``ESP_PM_CPU_FREQ_MAX`` | | APB: 80 MHz |
24 | | | 或 ``ESP_PM_APB_FREQ_MAX`` | | APB: 80 MHz |
Dpower_management_esp32.rst2 | CPU最高频率 | 电源管理锁获取情况 | APB 频率和 CPU 频率 |
7 | | | | APB: 80 MHz |
13 | | | | APB: 80 MHz |
16 | | | 未获得 ``ESP_PM_CPU_FREQ_MAX`` | | APB: 80 MHz |
22 | | | 或 ``ESP_PM_APB_FREQ_MAX`` | | APB: 80 MHz |
/hal_espressif-3.6.0/docs/en/api-reference/system/inc/
Dpower_management_esp32s2_and_later.rst2 | Max CPU | Lock Acquisition | CPU and APB Frequncies |
6 | | | | APB: 80 MHz |
9 | | ``ESP_PM_CPU_FREQ_MAX`` not acquired | | APB: 80 MHz |
15 | | | | APB: 80 MHz |
18 | | ``ESP_PM_CPU_FREQ_MAX`` not acquired | | APB: 80 MHz |
24 | | | or ``ESP_PM_APB_FREQ_MAX`` acquired | | APB: 80 MHz |
Dpower_management_esp32.rst2 | Max CPU | Lock Acquisition | CPU and APB Frequncies |
7 | | | | APB: 80 MHz |
13 | | | | APB: 80 MHz |
16 | | ``ESP_PM_CPU_FREQ_MAX`` not acquired | | APB: 80 MHz |
22 | | | or ``ESP_PM_APB_FREQ_MAX`` acquired | | APB: 80 MHz |
/hal_espressif-3.6.0/docs/zh_CN/api-reference/peripherals/
Di2c.rst107 当 :cpp:member:`i2c_config_t::clk_flags` 为 0 时，时钟分配器将仅根据所需频率进行选择。如果不需要诸如 APB 之类的特殊功能，则可以将时钟分配器配置为仅根据…
123 * - APB 时钟
138 * - APB 时钟
148 1. :c:macro:`I2C_SCLK_SRC_FLAG_AWARE_DFS`：当 APB 时钟改变时，时钟的波特率不会改变。
149 2. :c:macro:`I2C_SCLK_SRC_FLAG_LIGHT_SLEEP`：支持轻度睡眠模式，APB 时钟则不支持。
191 1. :c:macro:`I2C_SCLK_SRC_FLAG_AWARE_DFS`：当 APB 时钟改变时，时钟的波特率不会改变。
192 2. :c:macro:`I2C_SCLK_SRC_FLAG_LIGHT_SLEEP`：支持轻度睡眠模式，APB 时钟则不支持。
321 通过调用下表中提供的专用函数，可以将所有这些参数更改为用户自定义值。请注意，时序值是在 APB 时钟周期中定义。APB 的频率在 :cpp:type:`I2C_APB_CLK_FREQ` 中指定。
/hal_espressif-3.6.0/docs/en/api-reference/system/
Dpower_management.rst9 Power management algorithm included in ESP-IDF can adjust the advanced peripheral bus (APB) frequen…
15 - Driver for a peripheral clocked from APB can request the APB frequency to be set to 80 MHz while …
19 Since requesting higher APB or CPU frequencies or disabling light sleep causes higher current consu…
68 …- Requests the APB frequency to be at the maximum supported value. For {IDF_TARGET_NAME}, this is …
75 The table below shows how CPU and APB frequencies will be switched if dynamic frequency scaling is …
99 …APB frequency can be changed multiple times within a single RTOS tick. The APB frequency change do…
101 The following peripherals work normally even when the APB frequency is changing:
/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/
Ddport_access.c57 : [APB]"=a"(apb), [REG]"+a"(reg), [LVL]"=a"(intLvl)\ in esp_dport_access_reg_read()
99 : [APB]"=a"(apb), [REG]"+a"(reg)\ in esp_dport_access_sequence_reg_read()
/hal_espressif-3.6.0/components/esp_system/
Dint_wdt.c126 #define ERI_ADDR(APB) (0x100000 + (APB)) in esp_int_wdt_init() argument
DKconfig96 … wise RTC fast memory operates on APB clock and hence does not have much performance impact.
341 …the UART clock source is the APB clock and all baud rates in the available range will be sufficien…
/hal_espressif-3.6.0/docs/en/api-reference/peripherals/
Di2c.rst107 …g to the desired frequency. If no special capabilities are needed, such as APB, you can configure …
123 * - APB clock
138 * - APB clock
148 …1. :c:macro:`I2C_SCLK_SRC_FLAG_AWARE_DFS`: Clock's baud rate will not change while APB clock is ch…
149 …2. :c:macro:`I2C_SCLK_SRC_FLAG_LIGHT_SLEEP`: It supports Light-sleep mode, which APB clock cannot …
191 1. :c:macro:`I2C_SCLK_SRC_FLAG_AWARE_DFS`: Clock's baud rate will not change while APB clock is cha…
192 2. :c:macro:`I2C_SCLK_SRC_FLAG_LIGHT_SLEEP`: It supports Light-sleep mode, which APB clock cannot d…
321 …below. Please note that the timing values are defined in APB clock cycles. The frequency of APB is…
Drmt.rst125 …L as source clock. The benefit is, RMT channel can continue work even when APB clock is changing. …
128 …iv** to a value within [1 .. 255] range. The RMT source clock is typically APB CLK, 80Mhz by defau…
254 * Selection of the clock source, note that currently one clock source is supported, the APB clock w…
Dtwai.rst86 … line is **optional** and outputs a prescaled version of the controller's source clock (APB Clock).
172 …f each time quantum by dividing the TWAI controller's source clock (80 MHz APB clock). On the {IDF…
Dspi_master.rst527 …In the ideal case, if the Device is so fast that the input delay is shorter than an APB clock cycl…
568 …The figure below shows the relationship between frequency limit and input delay. Two extra APB clo…
Dmcpwm.rst158 …32-bit capture timer is enabled. The timer runs continuously driven by the APB clock. The clock fr…
/hal_espressif-3.6.0/zephyr/esp32/src/common/
Ddport_access.c22 : [APB] "=a" (apb), [REG] "+a" (reg), [LVL] "=a" (intLvl) \ in esp_dport_access_reg_read()
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32/
Dhighint_hdl.S313 #define ERI_ADDR(APB) (0x100000 + (APB)) argument
/hal_espressif-3.6.0/components/esptool_py/esptool/docs/en/advanced-topics/
Dboot-mode-selection.rst302 …ck frequency divider. This is an integer clock divider value from an 80MHz APB clock, based on the…
303 …are bootloader at a lower frequency than the flash_freq value. The initial APB clock frequency is …
304 …When the software bootloader starts it sets the APB clock to 80MHz causing the SPI clock frequency…
/hal_espressif-3.6.0/components/esp_hw_support/test/
Dtest_dport.c465 : [APB]"=a"(apb), [REG]"+a"(reg), [LVL]"=a"(intLvl)\ in test_dport_access_reg_read()
/hal_espressif-3.6.0/components/esp_pm/
DKconfig29 When APB clock frequency changes, high-resolution timer (esp_timer)
/hal_espressif-3.6.0/examples/system/esp_timer/
DREADME.md5 …sociated with managing multiple timers, invoking callbacks, accounting for APB frequency changes (…
/hal_espressif-3.6.0/components/driver/
DKconfig121 …n the ESP32, when a transmit interrupt occurs, and interrupt register is read on the same APB clock